131   ArchVersion = llvm::ARM::parseArchVersion(SubArch);  in setArchInfo()
142       (ArchISA == llvm::ARM::ISAKind::ARM && ArchVersion >= 6) ||  in setAtomic()
143       (ArchISA == llvm::ARM::ISAKind::THUMB && ArchVersion >= 7);  in setAtomic()
171   return CPUAttr.count('T') || ArchVersion >= 6;  in supportsThumb()
176          (ArchVersion >= 7 && !CPUAttr.equals("8M_BASE"));  in supportsThumb2()
566       if (CPUProfile != "M" || ArchVersion != 8) {  in handleTargetFeatures()
603   switch (ArchVersion) {  in handleTargetFeatures()
732   Builder.defineMacro("__ARM_ARCH", Twine(ArchVersion));  in getTargetDefines()
734   if (ArchVersion >= 8) {  in getTargetDefines()
787   if (ArchVersion == 5 || (ArchVersion == 6 && CPUProfile != "M") ||  in getTargetDefines()
788       ArchVersion > 6)  in getTargetDefines()
803   if (ArchVersion >= 7 && (FPU & VFP4FPU))  in getTargetDefines()
811   if (5 <= ArchVersion && ArchVersion <= 8 && !getTriple().isOSWindows())  in getTargetDefines()
845   if ((CPUProfile != "M" && ArchVersion >= 6) || (CPUProfile == "M" && DSP))  in getTargetDefines()
878   if ((FPU & NeonFPU) && !SoftFloat && ArchVersion >= 7) {  in getTargetDefines()
903   if (ArchVersion == 8 && ArchProfile == llvm::ARM::ProfileKind::M)  in getTargetDefines()
906   if (ArchVersion >= 6 && CPUAttr != "6M" && CPUAttr != "8M_BASE") {  in getTargetDefines()
920   if ((ArchVersion == 6 && CPUProfile != "M") || ArchVersion > 6) {  in getTargetDefines()
1091     if (CPUAttr.equals("6T2") || ArchVersion >= 7) {  in validateAsmConstraint()