Lines Matching refs:dmap
43 dbdma_start(dbdma_regmap_t *dmap, dbdma_command_t *commands) in dbdma_start() argument
50 dmap->d_intselect = 0xff; /* Endian magic - clear out interrupts */ in dbdma_start()
51 DBDMA_ST4_ENDIAN(&dmap->d_control, in dbdma_start()
59 while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE) in dbdma_start()
62 dmap->d_cmdptrhi = 0; /* 64-bit not yet */ in dbdma_start()
63 DBDMA_ST4_ENDIAN(&dmap->d_cmdptrlo, addr); in dbdma_start()
65 DBDMA_ST4_ENDIAN(&dmap->d_control, DBDMA_SET_CNTRL(DBDMA_CNTRL_RUN)); in dbdma_start()
69 dbdma_stop(dbdma_regmap_t *dmap) in dbdma_stop() argument
71 out32rb(&dmap->d_control, DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_RUN) | in dbdma_stop()
74 while (in32rb(&dmap->d_status) & in dbdma_stop()
79 dbdma_flush(dbdma_regmap_t *dmap) in dbdma_flush() argument
81 out32rb(&dmap->d_control, DBDMA_SET_CNTRL(DBDMA_CNTRL_FLUSH)); in dbdma_flush()
83 while (in32rb(&dmap->d_status) & (DBDMA_CNTRL_FLUSH)); in dbdma_flush()
87 dbdma_reset(dbdma_regmap_t *dmap) in dbdma_reset() argument
89 out32rb(&dmap->d_control, in dbdma_reset()
97 while (in32rb(&dmap->d_status) & DBDMA_CNTRL_RUN); in dbdma_reset()
101 dbdma_continue(dbdma_regmap_t *dmap) in dbdma_continue() argument
103 out32rb(&dmap->d_control, in dbdma_continue()
109 dbdma_pause(dbdma_regmap_t *dmap) in dbdma_pause() argument
111 DBDMA_ST4_ENDIAN(&dmap->d_control,DBDMA_SET_CNTRL(DBDMA_CNTRL_PAUSE)); in dbdma_pause()
113 while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE) in dbdma_pause()