Lines Matching refs:OutputBecomesInput

11454   bool OutputBecomesInput = false;  in getNDSWDS()  local
11460 OutputBecomesInput = true; in getNDSWDS()
11479 OutputBecomesInput); in getNDSWDS()
11521 StringRef MangledName, bool OutputBecomesInput, in addAArch64VectorName() argument
11526 if (OutputBecomesInput) in addAArch64VectorName()
11537 bool OutputBecomesInput, in addAArch64AdvSIMDNDSNames() argument
11542 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11544 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11548 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11550 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11554 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11556 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11561 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11579 const bool OutputBecomesInput = std::get<2>(Data); in emitAArch64DeclareSimdFunction() local
11623 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11631 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11633 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11637 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11641 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11651 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11660 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11662 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11666 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11670 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()