141     AtomicOrdering Ordering = AtomicOrdering::SequentiallyConsistent) {  in MakeBinaryAtomicValue()
224       Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent);  in EmitBinaryAtomicPost()
266       Args[0], Args[1], Args[2], llvm::AtomicOrdering::SequentiallyConsistent,  in MakeAtomicCmpXchgValue()
267       llvm::AtomicOrdering::SequentiallyConsistent);  in MakeAtomicCmpXchgValue()
293     AtomicOrdering SuccessOrdering = AtomicOrdering::SequentiallyConsistent) {  in EmitAtomicCmpXchgForMSIntrin()
385     AtomicOrdering Ordering = AtomicOrdering::SequentiallyConsistent) {  in EmitAtomicIncrementValue()
398     AtomicOrdering Ordering = AtomicOrdering::SequentiallyConsistent) {  in EmitAtomicDecrementValue()
908   case BitTest::Sequential: return llvm::AtomicOrdering::SequentiallyConsistent;  in getBitTestAtomicOrdering()
1516         *this, E, AtomicOrdering::SequentiallyConsistent);  in EmitMSVCBuiltinExpr()
3798     Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent);  in EmitBuiltinExpr()
3867             llvm::AtomicOrdering::SequentiallyConsistent);  in EmitBuiltinExpr()
3886         llvm::AtomicOrdering::SequentiallyConsistent};  in EmitBuiltinExpr()
3936         Store->setOrdering(llvm::AtomicOrdering::SequentiallyConsistent);  in EmitBuiltinExpr()
3951         llvm::AtomicOrdering::SequentiallyConsistent};  in EmitBuiltinExpr()
3999         Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, SSID);  in EmitBuiltinExpr()
4032     Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, SSID);  in EmitBuiltinExpr()
4367       AtomicOrdering::Monotonic : AtomicOrdering::SequentiallyConsistent;  in EmitBuiltinExpr()
9462     return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent,  in EmitAArch64BuiltinExpr()
10374       llvm::AtomicOrdering::SequentiallyConsistent);  in EmitAArch64BuiltinExpr()
14594     return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent,  in EmitX86BuiltinExpr()
14612     return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent,  in EmitX86BuiltinExpr()
15507       AO = llvm::AtomicOrdering::SequentiallyConsistent;  in ProcessOrderScopeAMDGCN()
15524   llvm::AtomicOrdering AO = llvm::AtomicOrdering::SequentiallyConsistent;  in EmitAMDGPUBuiltinExpr()
16539                                    AtomicOrdering::SequentiallyConsistent);  in EmitNVPTXBuiltinExpr()