Lines Matching defs:ops

86     a design would require index recalculation in the conversion of ops that
106 There are also multiple ops for which there is no clear mapping in LLVM.
110 ### Arithmetic ops
112 SPIR-V arithmetic ops mostly have a direct equivalent in LLVM Dialect. Such
131 ### Bitwise ops
133 SPIR-V has a range of bit ops that are mapped to LLVM dialect ops, intrinsics or
138 As with arithmetic ops, most of bitwise ops have a semantically equivalent op in
147 Also, some of bitwise ops can be modelled with LLVM intrinsics:
163 #### Bitfield ops
165 SPIR-V dialect has three bitfield ops: `spirv.BitFieldInsert`,
167 outline the general design of conversion patterns for this ops, and then
170 All of these ops take `base`, `offset` and `count` (`insert` for
208     bitwidth of `base`, truncation is still permitted. This is because the ops
213 Now, having these two cases in mind, we can proceed with conversion for the ops
278 ### Cast ops
327 ### Comparison ops
329 SPIR-V comparison ops are mapped to LLVM `icmp` and `fcmp` operations.
356 ### Composite ops
404 ### Logical ops
406 Logical ops follow a similar pattern as bitwise ops, with the difference that
408 emulate SPIR-V ops behaviour:
425 ### Memory ops
451 These ops are converted to their LLVM counterparts: `llvm.load` and
477 `spirv.mlir.addressof` and `llvm.mlir.addressof` ops that both return a pointer
548 some scoping. For example, if converting ops executed in a loop into `alloca`s,
552 ### Miscellaneous ops with direct conversions
554 There are multiple SPIR-V ops that do not fit in a particular group but can be
563 ### Shift ops
618 ### Not implemented ops
620 There is no support of the following ops:
622 *   All atomic ops
623 *   All group ops
624 *   All matrix ops
625 *   All CL ops
650 ### Branch ops
670 to LLVM via branch ops. The conversion can only be applied to selection or loop
726 This section describes how SPIR-V ops from GLSL extended instructions set are
777 ## Function conversion and related ops
803 In LLVM IR, functions may return either 1 or 0 value. Hence, we map both ops to
806 ## Module ops
816 to LLVM ops. At the moment, SPIR-V module attributes are ignored.