Lines Matching refs:vsll

12 ; CHECK-NEXT:    vsll.vi v8, v8, 8
31 ; CHECK-NEXT:    vsll.vi v8, v8, 8
50 ; CHECK-NEXT:    vsll.vi v8, v8, 8
69 ; CHECK-NEXT:    vsll.vi v8, v8, 8
88 ; CHECK-NEXT:    vsll.vi v8, v8, 8
107 ; CHECK-NEXT:    vsll.vi v8, v8, 8
132 ; CHECK-NEXT:    vsll.vi v10, v10, 8
133 ; CHECK-NEXT:    vsll.vi v8, v8, 24
159 ; CHECK-NEXT:    vsll.vi v10, v10, 8
160 ; CHECK-NEXT:    vsll.vi v8, v8, 24
186 ; CHECK-NEXT:    vsll.vi v12, v12, 8
187 ; CHECK-NEXT:    vsll.vi v8, v8, 24
213 ; CHECK-NEXT:    vsll.vi v16, v16, 8
214 ; CHECK-NEXT:    vsll.vi v8, v8, 24
240 ; CHECK-NEXT:    vsll.vi v24, v24, 8
241 ; CHECK-NEXT:    vsll.vi v8, v8, 24
274 ; RV32-NEXT:    vsll.vx v12, v8, a1
279 ; RV32-NEXT:    vsll.vx v11, v11, a2
287 ; RV32-NEXT:    vsll.vi v8, v8, 24
288 ; RV32-NEXT:    vsll.vi v12, v12, 8
317 ; RV64-NEXT:    vsll.vi v11, v11, 24
320 ; RV64-NEXT:    vsll.vi v10, v10, 8
322 ; RV64-NEXT:    vsll.vx v11, v8, a0
324 ; RV64-NEXT:    vsll.vx v8, v8, a1
358 ; RV32-NEXT:    vsll.vx v16, v8, a1
363 ; RV32-NEXT:    vsll.vx v14, v14, a2
371 ; RV32-NEXT:    vsll.vi v8, v8, 24
372 ; RV32-NEXT:    vsll.vi v16, v16, 8
401 ; RV64-NEXT:    vsll.vi v14, v14, 24
404 ; RV64-NEXT:    vsll.vi v12, v12, 8
406 ; RV64-NEXT:    vsll.vx v14, v8, a0
408 ; RV64-NEXT:    vsll.vx v8, v8, a1
442 ; RV32-NEXT:    vsll.vx v24, v8, a1
447 ; RV32-NEXT:    vsll.vx v20, v20, a2
455 ; RV32-NEXT:    vsll.vi v8, v8, 24
456 ; RV32-NEXT:    vsll.vi v24, v24, 8
485 ; RV64-NEXT:    vsll.vi v20, v20, 24
488 ; RV64-NEXT:    vsll.vi v16, v16, 8
490 ; RV64-NEXT:    vsll.vx v20, v8, a0
492 ; RV64-NEXT:    vsll.vx v8, v8, a1
529 ; RV32-NEXT:    vsll.vx v0, v8, a1
535 ; RV32-NEXT:    vsll.vx v16, v16, a2
553 ; RV32-NEXT:    vsll.vi v8, v8, 24
554 ; RV32-NEXT:    vsll.vi v16, v16, 8
591 ; RV64-NEXT:    vsll.vi v0, v0, 24
594 ; RV64-NEXT:    vsll.vi v24, v24, 8
596 ; RV64-NEXT:    vsll.vx v0, v8, a0
598 ; RV64-NEXT:    vsll.vx v8, v8, a1