Lines Matching defs:SSECC

23430   unsigned SSECC;
23446   case ISD::SETEQ:  SSECC = 0; break;
23450   case ISD::SETOLT: SSECC = 1; break;
23454   case ISD::SETOLE: SSECC = 2; break;
23455   case ISD::SETUO:  SSECC = 3; break;
23457   case ISD::SETNE:  SSECC = 4; break;
23459   case ISD::SETUGE: SSECC = 5; break;
23461   case ISD::SETUGT: SSECC = 6; break;
23462   case ISD::SETO:   SSECC = 7; break;
23463   case ISD::SETUEQ: SSECC = 8; break;
23464   case ISD::SETONE: SSECC = 12; break;
23486   return SSECC;
23700     unsigned SSECC = translateX86FSETCC(Cond, Op0, Op1, IsAlwaysSignaling);
23763               {Chain, Op0, Op1, DAG.getTargetConstant(SSECC, dl, MVT::i8)});
23767               Opc, dl, VT, Op0, Op1, DAG.getTargetConstant(SSECC, dl, MVT::i8));
23773         SSECC |= (IsAlwaysSignaling ^ IsSignaling) << 4;
23776             {Chain, Op0, Op1, DAG.getTargetConstant(SSECC, dl, MVT::i8)});
23780             Opc, dl, VT, Op0, Op1, DAG.getTargetConstant(SSECC, dl, MVT::i8));
24610     unsigned SSECC =
24617                       DAG.getTargetConstant(SSECC, DL, MVT::i8));
24622     if (SSECC < 8 || Subtarget.hasAVX()) {
24624                                 DAG.getTargetConstant(SSECC, DL, MVT::i8));