Lines Matching defs:HighOpcode

96   unsigned HighOpcode = getOpcodeForOffset(NewOpcode, HighOffsetOp.getImm());
98   assert(HighOpcode && LowOpcode && "Both offsets should be in range");
99   HighPartMI->setDesc(get(HighOpcode));
151 // if the first operand is a low GR32 and HighOpcode if the first operand
153 // and HighOpcode takes an unsigned 32-bit operand.  In those cases,
155 // if HighOpcode is used.
157                                       unsigned HighOpcode,
161   MI.setDesc(get(IsHigh ? HighOpcode : LowOpcode));
168 // followed by HighOpcode or LowOpcode, depending on whether the target
172                                        unsigned HighOpcode) const {
186     MI.setDesc(get(DestIsHigh ? HighOpcode : LowOpcode));
192 // if the first operand is a low GR32 and HighOpcode if the first operand
195                                        unsigned HighOpcode) const {
198       SystemZ::isHighReg(Reg) ? HighOpcode : LowOpcode,
205 // register is a low GR32 and HighOpcode if the register is a high GR32.
207                                        unsigned HighOpcode) const {
209   unsigned Opcode = SystemZ::isHighReg(Reg) ? HighOpcode : LowOpcode;