Lines Matching refs:pattern

23                list<dag> pattern> : Instruction {
31 let Pattern = pattern;
36 class CSKYPseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
37 : CSKYInst<AddrModeNone, 0, outs, ins, asmstr, pattern> {
43 list<dag> pattern>
44 : CSKYInst<am, 4, outs, ins, asmstr, pattern> {
49 class CSKY16Inst<AddrMode am, dag outs, dag ins, string asmstr, list<dag> pattern>
50 : CSKYInst<am, 2, outs, ins, asmstr, pattern> {
57 class J<bits<6> opcode, dag outs, dag ins, string op, list<dag> pattern>
59 pattern> {
68 class I_18_Z_L<bits<3> sop, string asm, dag outs, dag ins, list<dag> pattern>
69 : CSKY32Inst<AddrModeNone, 0x33, outs, ins, asm, pattern> {
79 class I_16_ZX<string op, ImmLeaf ImmType, list<dag> pattern>
82 !strconcat(op, "\t$rz, $rx, $imm16"), pattern> {
109 class I_16_Z_L<bits<5> sop, string op, dag ins, list<dag> pattern>
111 !strconcat(op, "\t$rz, $imm16"), pattern> {
121 class I_16_L<bits<5> sop, dag outs, dag ins, string asm, list<dag> pattern>
122 : CSKY32Inst<AddrModeNone, 0x3a, outs, ins, asm, pattern> {
131 class I_16_JX<bits<5> sop, string op, list<dag> pattern>
133 !strconcat(op, "\t$rx"), pattern> {
143 class I_16_J_XI<bits<5> sop, string op, Operand operand, list<dag> pattern>
146 !strconcat(op, "\t$rx, $imm2"), pattern> {
157 class I_16_RET<bits<5> sop, bits<5> pcode, string op, list<dag> pattern>
158 : CSKY32Inst<AddrModeNone, 0x3a, (outs), (ins), op, pattern> {
211 string op, list<dag> pattern>
213 pattern> {
224 string op, list<dag> pattern>
226 pattern> {
265 list<dag> pattern>
268 !strconcat(op, "\t$rz, $rx, $imm5"), pattern> {
284 list<dag> pattern>
286 !strconcat(op, "\t$rz, $rx, $imm5"), pattern> {
299 list<dag> pattern>
300 : CSKY32Inst<AddrModeNone, 0x30, outs, ins, opStr, pattern> {
388 class I_5_YX<bits<6> opcode, bits<6> sop, dag outs, dag ins, string opStr, list<dag> pattern>
389 : CSKY32Inst<AddrModeNone, opcode, outs, ins, opStr, pattern> {
402 class I_5_XZ_U<bits<6> sop, dag outs, dag ins, string op, list<dag> pattern>
404 pattern> {
416 class I_5_XZ_INS<bits<6> sop, dag outs, dag ins, string op, list<dag> pattern>
418 pattern> {
433 string op, list<dag> pattern>
434 : CSKY32Inst<AddrModeNone, 0x31, outs, ins, !strconcat(op, "\t$rz, $rx"), pattern> {
446 class I_5_ZX_U<bits<6> sop, string op, Operand operand, list<dag> pattern>
448 !strconcat(op, "\t$rz, operand:$size_lsb"), pattern> {
472 list<dag> pattern>
475 !strconcat(op, "\t$rx, $imm5"), pattern> {
489 list<dag> pattern>
491 !strconcat(op, "\t$rz, $imm5"), pattern> {
502 list<dag> pattern>
504 !strconcat(op, "\t$imm5"), pattern> {
518 string op, list<dag> pattern>
520 !strconcat(op, "\t$rz, $rx, $ry"), pattern> {
531 // R_YXZ instructions with simple pattern
547 dag ins, string op, list<dag> pattern>
549 op # "\t$rz, ($rx, $ry << ${imm})", pattern> {
570 list<dag> pattern>
572 pattern> {
616 class R_ZX<bits<6> sop, bits<5> pcode, string op, list<dag> pattern>
619 !strconcat(op, "\t$rz, $rx"), pattern> {
633 class R_X<bits<6> sop, bits<5> pcode, dag outs, dag ins, string op, list<dag> pattern>
634 : CSKY32Inst<AddrModeNone, 0x31, outs, ins, !strconcat(op, "\t$rx"), pattern> {