Lines Matching defs:DefRegs

1138   SmallVector<Register, 16> DefRegs(OpdMapper.getVRegs(0));
2140   SmallVector<Register, 2> DefRegs(OpdMapper.getVRegs(0));
2145   if (DefRegs.empty()) {
2151   assert(DefRegs.size() == 2);
2174   setRegsToType(MRI, DefRegs, HalfTy);
2198   B.buildAdd(DefRegs[1], Add, MulHiLo);
2199   B.buildMul(DefRegs[0], Src0Regs[0], Src1Regs[0]);
2223     SmallVector<Register, 1> DefRegs(OpdMapper.getVRegs(0));
2224     if (DefRegs.empty())
2225       DefRegs.push_back(DstReg);
2240     B.buildTrunc(DefRegs[0], NewDstReg);
2330     SmallVector<Register, 1> DefRegs(OpdMapper.getVRegs(0));
2331     if (DefRegs.empty())
2332       DefRegs.push_back(DstReg);
2333     B.buildTrunc(DefRegs[0], NewDstReg);
2362     SmallVector<Register, 2> DefRegs(OpdMapper.getVRegs(0));
2367     if (DefRegs.empty()) {
2383     setRegsToType(MRI, DefRegs, HalfTy);
2386     B.buildSelect(DefRegs[0], CondRegs[0], Src1Regs[0], Src2Regs[0], Flags);
2387     B.buildSelect(DefRegs[1], CondRegs[0], Src1Regs[1], Src2Regs[1], Flags);
2439     SmallVector<Register, 2> DefRegs(OpdMapper.getVRegs(0));
2444     if (DefRegs.empty()) {
2449     assert(DefRegs.size() == 2);
2467     setRegsToType(MRI, DefRegs, HalfTy);
2470     B.buildInstr(Opc, {DefRegs[0]}, {Src0Regs[0], Src1Regs[0]}, Flags);
2471     B.buildInstr(Opc, {DefRegs[1]}, {Src0Regs[1], Src1Regs[1]}, Flags);
2761       SmallVector<Register, 2> DefRegs(OpdMapper.getVRegs(0));
2766         B.buildSExtOrTrunc(DefRegs[0], SrcReg);
2768         B.buildZExtOrTrunc(DefRegs[0], SrcReg);
2770         B.buildAnyExtOrTrunc(DefRegs[0], SrcReg);
2773       extendLow32IntoHigh32(B, DefRegs[1], DefRegs[0], Opc, *SrcBank);
2786       SmallVector<Register, 2> DefRegs(OpdMapper.getVRegs(0));
2805         B.buildSelect(DefRegs[0], SrcReg, True, False);
2806         extendLow32IntoHigh32(B, DefRegs[1], DefRegs[0], Opc, *SrcBank, true);