Lines Matching defs:RegNum
389 unsigned RegNum;
415 unsigned RegNum;
425 unsigned RegNum;
677 return Reg.RegNum;
682 return MatrixReg.RegNum;
707 return VectorList.RegNum;
1254 Reg.RegNum) ||
1256 Reg.RegNum));
1262 Reg.RegNum));
1391 AArch64MCRegisterClasses[AArch64::GPR64RegClassID].contains(Reg.RegNum);
1396 AArch64MCRegisterClasses[AArch64::GPR32RegClassID].contains(Reg.RegNum);
1402 Reg.RegNum);
1408 Reg.RegNum);
1414 Reg.RegNum);
1418 return isGPR64<AArch64::GPR64RegClassID>() && Reg.RegNum == AArch64::XZR;
1483 if (!AArch64MCRegisterClasses[RegClass].contains(VectorList.RegNum))
1495 if ((VectorList.RegNum < (AArch64::Z0 + Stride)) ||
1496 ((VectorList.RegNum >= AArch64::Z16) &&
1497 (VectorList.RegNum < (AArch64::Z16 + Stride))))
2318 CreateReg(unsigned RegNum, RegKind Kind, SMLoc S, SMLoc E, MCContext &Ctx,
2324 Op->Reg.RegNum = RegNum;
2337 CreateVectorReg(unsigned RegNum, RegKind Kind, unsigned ElementWidth,
2346 auto Op = CreateReg(RegNum, Kind, S, E, Ctx, EqualsReg, ExtTy, ShiftAmount,
2353 CreateVectorList(unsigned RegNum, unsigned Count, unsigned Stride,
2357 Op->VectorList.RegNum = RegNum;
2558 CreateMatrixRegister(unsigned RegNum, unsigned ElementWidth, MatrixKind Kind,
2561 Op->MatrixReg.RegNum = RegNum;
3019 unsigned RegNum = 0;
3020 if ((RegNum = matchSVEDataVectorRegName(Name)))
3021 return Kind == RegKind::SVEDataVector ? RegNum : 0;
3023 if ((RegNum = matchSVEPredicateVectorRegName(Name)))
3024 return Kind == RegKind::SVEPredicateVector ? RegNum : 0;
3026 if ((RegNum = matchSVEPredicateAsCounterRegName(Name)))
3027 return Kind == RegKind::SVEPredicateAsCounter ? RegNum : 0;
3029 if ((RegNum = MatchNeonVectorRegName(Name)))
3030 return Kind == RegKind::NeonVector ? RegNum : 0;
3032 if ((RegNum = matchMatrixRegName(Name)))
3033 return Kind == RegKind::Matrix ? RegNum : 0;
3039 if ((RegNum = MatchRegisterName(Name)))
3040 return (Kind == RegKind::Scalar) ? RegNum : 0;
3042 if (!RegNum) {
3044 if (auto RegNum = StringSwitch<unsigned>(Name.lower())
3050 return Kind == RegKind::Scalar ? RegNum : 0;
3059 // set RegNum if the match is the right kind of register
3061 RegNum = Entry->getValue().second;
3063 return RegNum;
3085 ParseStatus AArch64AsmParser::tryParseScalarRegister(MCRegister &RegNum) {
3095 RegNum = Reg;
3243 MCRegister RegNum;
3248 if (!tryParseScalarRegister(RegNum).isSuccess())
3251 if (RegNum != AArch64::XZR) {
3259 if (!tryParseScalarRegister(RegNum).isSuccess())
3262 if (RegNum != AArch64::XZR)
3268 RegNum, RegKind::Scalar, StartLoc, getLoc(), getContext()));
4300 unsigned RegNum = matchRegisterNameAlias(Head, MatchKind);
4302 if (RegNum) {
4310 Reg = RegNum;
4333 MCRegister RegNum;
4334 auto Res = tryParseVectorRegister(RegNum, Kind, RK);
4344 RegNum, RK, ElementWidth, S,
4499 unsigned RegNum = matchMatrixTileListRegName(Name);
4500 if (!RegNum)
4510 Reg = RegNum;
4730 MCRegister RegNum;
4731 ParseStatus Res = tryParseScalarRegister(RegNum);
4737 RegNum, RegKind::Scalar, StartLoc, getLoc(), getContext()));
4752 RegNum, RegKind::Scalar, StartLoc, getLoc(), getContext()));
4761 unsigned RegNum = matchRegisterNameAlias(Name, RegKind::LookupTable);
4763 if (RegNum == 0)
4767 RegNum, RegKind::LookupTable, StartLoc, getLoc(), getContext()));
4798 MCRegister RegNum;
4799 ParseStatus Res = tryParseScalarRegister(RegNum);
4806 RegNum, RegKind::Scalar, StartLoc, getLoc(), getContext(), EqTy));
4821 RegNum, RegKind::Scalar, StartLoc, Ext->getEndLoc(), getContext(), EqTy,
7403 MCRegister RegNum;
7404 ParseStatus ParseRes = tryParseScalarRegister(RegNum);
7409 ParseRes = tryParseVectorRegister(RegNum, Kind, RegKind::NeonVector);
7422 tryParseVectorRegister(RegNum, Kind, RegKind::SVEDataVector);
7435 ParseRes = tryParseVectorRegister(RegNum, Kind, RegKind::SVEPredicateVector);
7452 auto pair = std::make_pair(RegisterKind, (unsigned) RegNum);
8396 MCRegister RegNum;
8400 tryParseVectorRegister(RegNum, Kind, RegKind::SVEDataVector);
8417 RegNum, RegKind::SVEDataVector, ElementWidth, S, S, getContext()));
8436 RegNum, RegKind::SVEDataVector, ElementWidth, S, Ext->getEndLoc(),