Lines Matching defs:RegisterVT

354     MVT RegisterVT;
361           NumIntermediates, RegisterVT);
365                                      NumIntermediates, RegisterVT);
370     assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
371     assert(RegisterVT.getSizeInBits() ==
759   MVT RegisterVT;
765         RegisterVT);
769                                    NumIntermediates, RegisterVT);
774   assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
863     MVT RegisterVT =
869     RegVTs.push_back(RegisterVT);
892     MVT RegisterVT = isABIMangled()
901         P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT);
903         P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT, *Glue);
913           !RegisterVT.isInteger())
921       unsigned RegSize = RegisterVT.getScalarSizeInBits();
929         Parts[i] = DAG.getConstant(0, dl, RegisterVT);
950                              RegisterVT, P, DAG.getValueType(FromVT));
954                                      RegisterVT, ValueVT, V, Chain, CallConv);
975     MVT RegisterVT = isABIMangled()
980     if (ExtendKind == ISD::ANY_EXTEND && TLI.isZExtFree(Val, RegisterVT))
984                    NumParts, RegisterVT, V, CallConv, ExtendKind);
1060     MVT RegisterVT = RegVTs[Value];
1062                                            RegisterVT);
1066       Ops.push_back(DAG.getRegister(TheReg, RegisterVT));
1077     MVT RegisterVT = std::get<1>(CountAndVT);
1078     TypeSize RegisterSize = RegisterVT.getSizeInBits();
10976       MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), RetVT);
10978       unsigned RegisterVTByteSZ = RegisterVT.getSizeInBits() / 8;
10979       RetTys.append(NumRegs, RegisterVT);
11042       MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),
11049         MyFlags.VT = RegisterVT;
11320       MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),
11326           CLI.DAG, CLI.DL, &InVals[CurReg], NumRegs, RegisterVT, VT, nullptr,
11609     MVT RegisterVT = TLI->getRegisterType(*DAG.getContext(), ValueVT);
11610     ISD::InputArg RetArg(Flags, RegisterVT, ValueVT, true,
11739       MVT RegisterVT = TLI->getRegisterTypeForCallingConv(
11748             Flags, RegisterVT, VT, isArgValueUsed, ArgNo,
11749             PartBase + i * RegisterVT.getStoreSize().getKnownMinValue());