Lines Matching refs:buf

30   int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
32 void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
33 void writePltHeader(uint8_t *buf) const override;
34 void writePlt(uint8_t *buf, const Symbol &sym,
207 void MIPS<ELFT>::writeGotPlt(uint8_t *buf, const Symbol &) const {
211 write32(ctx, buf, va);
259 template <class ELFT> void MIPS<ELFT>::writePltHeader(uint8_t *buf) const {
264 memset(buf, 0, pltHeaderSize);
266 write16(ctx, buf,
268 write16(ctx, buf + 4, 0xff23); // lw $25, 0($3)
269 write16(ctx, buf + 8, 0x0535); // subu16 $2, $2, $3
270 write16(ctx, buf + 10, 0x2525); // srl16 $2, $2, 2
271 write16(ctx, buf + 12, 0x3302); // addiu $24, $2, -2
272 write16(ctx, buf + 14, 0xfffe);
273 write16(ctx, buf + 16, 0x0dff); // move $15, $31
275 write16(ctx, buf + 18, 0x0f83); // move $28, $3
276 write16(ctx, buf + 20, 0x472b); // jalrc $25
277 write16(ctx, buf + 22, 0x0c00); // nop
278 relocateNoSym(buf, R_MICROMIPS_PC19_S2, gotPlt - plt);
280 write16(ctx, buf + 18, 0x45f9); // jalrc $25
281 write16(ctx, buf + 20, 0x0f83); // move $28, $3
282 write16(ctx, buf + 22, 0x0c00); // nop
283 relocateNoSym(buf, R_MICROMIPS_PC23_S2, gotPlt - plt);
289 write32(ctx, buf, 0x3c0e0000); // lui $14, %hi(&GOTPLT[0])
290 write32(ctx, buf + 4, 0x8dd90000); // lw $25, %lo(&GOTPLT[0])($14)
291 write32(ctx, buf + 8, 0x25ce0000); // addiu $14, $14, %lo(&GOTPLT[0])
292 write32(ctx, buf + 12, 0x030ec023); // subu $24, $24, $14
293 write32(ctx, buf + 16, 0x03e07825); // move $15, $31
294 write32(ctx, buf + 20, 0x0018c082); // srl $24, $24, 2
296 write32(ctx, buf, 0x3c0e0000); // lui $14, %hi(&GOTPLT[0])
297 write32(ctx, buf + 4, 0xddd90000); // ld $25, %lo(&GOTPLT[0])($14)
298 write32(ctx, buf + 8, 0x25ce0000); // addiu $14, $14, %lo(&GOTPLT[0])
299 write32(ctx, buf + 12, 0x030ec023); // subu $24, $24, $14
300 write32(ctx, buf + 16, 0x03e07825); // move $15, $31
301 write32(ctx, buf + 20, 0x0018c0c2); // srl $24, $24, 3
303 write32(ctx, buf, 0x3c1c0000); // lui $28, %hi(&GOTPLT[0])
304 write32(ctx, buf + 4, 0x8f990000); // lw $25, %lo(&GOTPLT[0])($28)
305 write32(ctx, buf + 8, 0x279c0000); // addiu $28, $28, %lo(&GOTPLT[0])
306 write32(ctx, buf + 12, 0x031cc023); // subu $24, $24, $28
307 write32(ctx, buf + 16, 0x03e07825); // move $15, $31
308 write32(ctx, buf + 20, 0x0018c082); // srl $24, $24, 2
312 write32(ctx, buf + 24, jalrInst); // jalr.hb $25 or jalr $25
313 write32(ctx, buf + 28, 0x2718fffe); // subu $24, $24, 2
316 writeValue(ctx, buf, gotPlt + 0x8000, 16, 16);
317 writeValue(ctx, buf + 4, gotPlt, 16, 0);
318 writeValue(ctx, buf + 8, gotPlt, 16, 0);
322 void MIPS<ELFT>::writePlt(uint8_t *buf, const Symbol &sym,
327 memset(buf, 0, pltEntrySize);
330 write16(ctx, buf, 0x7840); // addiupc $2, (GOTPLT) - .
331 write16(ctx, buf + 4, 0xff22); // lw $25, 0($2)
332 write16(ctx, buf + 8, 0x0f02); // move $24, $2
333 write16(ctx, buf + 10, 0x4723); // jrc $25 / jr16 $25
334 relocateNoSym(buf, R_MICROMIPS_PC19_S2, gotPltEntryAddr - pltEntryAddr);
336 write16(ctx, buf, 0x7900); // addiupc $2, (GOTPLT) - .
337 write16(ctx, buf + 4, 0xff22); // lw $25, 0($2)
338 write16(ctx, buf + 8, 0x4599); // jrc $25 / jr16 $25
339 write16(ctx, buf + 10, 0x0f02); // move $24, $2
340 relocateNoSym(buf, R_MICROMIPS_PC23_S2, gotPltEntryAddr - pltEntryAddr);
351 write32(ctx, buf, 0x3c0f0000); // lui $15, %hi(.got.plt entry)
352 write32(ctx, buf + 4, loadInst); // l[wd] $25, %lo(.got.plt entry)($15)
353 write32(ctx, buf + 8, jrInst); // jr $25 / jr.hb $25
354 write32(ctx, buf + 12, addInst); // [d]addiu $24, $15, %lo(.got.plt entry)
355 writeValue(ctx, buf, gotPltEntryAddr + 0x8000, 16, 16);
356 writeValue(ctx, buf + 4, gotPltEntryAddr, 16, 0);
357 writeValue(ctx, buf + 12, gotPltEntryAddr, 16, 0);
385 int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *buf, RelType type) const {
394 return SignExtend64<32>(read32(ctx, buf));
399 return SignExtend64<28>(read32(ctx, buf) << 2);
405 return SignExtend64<16>(read32(ctx, buf)) << 16;
419 return SignExtend64<16>(read32(ctx, buf));
422 return SignExtend64<16>(readShuffle<e>(ctx, buf)) << 16;
433 return SignExtend64<16>(readShuffle<e>(ctx, buf));
435 return SignExtend64<9>(readShuffle<e>(ctx, buf) << 2);
437 return SignExtend64<18>(read32(ctx, buf) << 2);
439 return SignExtend64<21>(read32(ctx, buf) << 2);
441 return SignExtend64<23>(read32(ctx, buf) << 2);
443 return SignExtend64<28>(read32(ctx, buf) << 2);
445 return SignExtend64<32>(read32(ctx, buf));
447 return SignExtend64<27>(readShuffle<e>(ctx, buf) << 1);
449 return SignExtend64<8>(read16(ctx, buf) << 1);
451 return SignExtend64<11>(read16(ctx, buf) << 1);
453 return SignExtend64<17>(readShuffle<e>(ctx, buf) << 1);
455 return SignExtend64<21>(readShuffle<e>(ctx, buf) << 3);
457 return SignExtend64<21>(readShuffle<e>(ctx, buf) << 2);
459 return SignExtend64<22>(readShuffle<e>(ctx, buf) << 1);
461 return SignExtend64<25>(readShuffle<e>(ctx, buf) << 2);
463 return SignExtend64<27>(readShuffle<e>(ctx, buf) << 1);
469 return read64(ctx, buf);
471 return ctx.arg.is64 ? read64(ctx, buf) : read32(ctx, buf);
478 InternalErr(ctx, buf) << "cannot read addend for relocation " << type;