Lines Matching defs:mpi3mr_softc

539 struct mpi3mr_softc {  struct
540 device_t mpi3mr_dev;
541 struct cdev *mpi3mr_cdev;
542 u_int mpi3mr_flags;
547 U8 id;
548 int cpu_count;
549 char name[MPI3MR_NAME_LENGTH];
550 char driver_name[MPI3MR_NAME_LENGTH];
551 int bars;
552 bus_addr_t dma_loaddr;
553 u_int mpi3mr_debug;
554 struct mpi3mr_reset reset;
555 int max_msix_vectors;
556 int msix_count;
557 bool msix_enable;
558 int io_cmds_highwater;
559 int max_chains;
560 uint32_t chain_frame_size;
561 struct sysctl_ctx_list sysctl_ctx;
562 struct sysctl_oid *sysctl_tree;
563 char fw_version[32];
564 struct mpi3mr_chain *chains;
565 struct callout periodic;
566 struct callout device_check_callout;
568 struct mpi3mr_cam_softc *cam_sc;
569 struct mpi3mr_cmd **cmd_list;
571 struct mtx cmd_pool_lock;
573 struct resource *mpi3mr_regs_resource;
574 bus_space_handle_t mpi3mr_bhandle;
575 bus_space_tag_t mpi3mr_btag;
576 int mpi3mr_regs_rid;
578 bus_dma_tag_t mpi3mr_parent_dmat;
579 bus_dma_tag_t buffer_dmat;
581 int num_reqs;
582 int num_replies;
583 int num_chains;
586 struct mpi3mr_event_handle *mpi3mr_log_eh;
587 struct intr_config_hook mpi3mr_ich;
589 struct mtx mpi3mr_mtx;
590 struct mtx io_lock;
591 U8 intr_enabled;
595 U16 num_admin_reqs;
596 U32 admin_req_q_sz;
597 U16 admin_req_pi;
598 U16 admin_req_ci;
599 bus_dma_tag_t admin_req_tag;
600 bus_dmamap_t admin_req_dmamap;
601 bus_addr_t admin_req_phys;
602 U8 *admin_req;
603 struct mtx admin_req_lock;
605 U16 num_admin_replies;
606 U32 admin_reply_q_sz;
607 U16 admin_reply_ci;
608 U8 admin_reply_ephase;
609 bus_dma_tag_t admin_reply_tag;
610 bus_dmamap_t admin_reply_dmamap;
611 bus_addr_t admin_reply_phys;
612 U8 *admin_reply;
613 struct mtx admin_reply_lock;
614 bool admin_in_use;
616 U32 num_reply_bufs;
617 bus_dma_tag_t reply_buf_tag;
618 bus_dmamap_t reply_buf_dmamap;
619 bus_addr_t reply_buf_phys;
620 U8 *reply_buf;
621 bus_addr_t reply_buf_dma_max_address;
622 bus_addr_t reply_buf_dma_min_address;
624 U16 reply_free_q_sz;
625 bus_dma_tag_t reply_free_q_tag;
626 bus_dmamap_t reply_free_q_dmamap;
627 bus_addr_t reply_free_q_phys;
628 U64 *reply_free_q;
629 struct mtx reply_free_q_lock;
630 U32 reply_free_q_host_index;
632 U32 num_sense_bufs;
633 bus_dma_tag_t sense_buf_tag;
634 bus_dmamap_t sense_buf_dmamap;
635 bus_addr_t sense_buf_phys;
636 U8 *sense_buf;
638 U16 sense_buf_q_sz;
639 bus_dma_tag_t sense_buf_q_tag;
640 bus_dmamap_t sense_buf_q_dmamap;
641 bus_addr_t sense_buf_q_phys;
642 U64 *sense_buf_q;
643 struct mtx sense_buf_q_lock;
644 U32 sense_buf_q_host_index;
646 void *nvme_encap_prp_list;
647 bus_addr_t nvme_encap_prp_list_dma;
648 bus_dma_tag_t nvme_encap_prp_list_dmatag;
649 bus_dmamap_t nvme_encap_prp_list_dma_dmamap;
650 U32 nvme_encap_prp_sz;
652 U32 ready_timeout;
654 struct mpi3mr_irq_context *irq_ctx;
656 U16 num_queues; /* Number of request/reply queues */
657 struct mpi3mr_op_req_queue *op_req_q;
658 struct mpi3mr_op_reply_queue *op_reply_q;
659 U16 num_hosttag_op_req_q;
661 struct mpi3mr_drvr_cmd init_cmds;
662 struct mpi3mr_ioc_facts facts;
663 U16 reply_sz;
664 U16 op_reply_sz;
666 U32 event_masks[MPI3_EVENT_NOTIFY_EVENTMASK_WORDS];
668 char fwevt_worker_name[MPI3MR_NAME_LENGTH];
669 struct workqueue_struct *fwevt_worker_thread;
670 struct mtx fwevt_lock;
671 struct mtx target_lock;
673 U16 max_host_ios;
674 bus_dma_tag_t chain_sgl_list_tag;
675 struct mpi3mr_chain *chain_sgl_list;
676 U16 chain_bitmap_sz;
677 void *chain_bitmap;
678 struct mtx chain_buf_lock;
679 U16 chain_buf_count;
681 struct mpi3mr_drvr_cmd ioctl_cmds;
682 struct mpi3mr_drvr_cmd host_tm_cmds;
683 struct mpi3mr_drvr_cmd dev_rmhs_cmds[MPI3MR_NUM_DEVRMCMD];
684 struct mpi3mr_drvr_cmd evtack_cmds[MPI3MR_NUM_EVTACKCMD];
686 U16 devrem_bitmap_sz;
687 void *devrem_bitmap;
689 U16 dev_handle_bitmap_sz;
690 void *removepend_bitmap;
692 U16 evtack_cmds_bitmap_sz;
693 void *evtack_cmds_bitmap;
695 U32 ts_update_counter;
696 U8 reset_in_progress;
697 U8 unrecoverable;
698 U8 block_ioctls;
699 U8 in_prep_ciactv_rst;
700 U16 prep_ciactv_rst_counter;
701 struct mtx reset_mutex;
703 U8 prepare_for_reset;
704 U16 prepare_for_reset_timeout_counter;
706 U16 diagsave_timeout;
707 int logging_level;
708 U16 flush_io_count;
710 Mpi3DriverInfoLayout_t driver_info;
712 U16 change_count;
714 U8 *log_data_buffer;
715 U16 log_data_buffer_index;
716 U16 log_data_entry_size;
718 U8 pel_wait_pend;
719 U8 pel_abort_requested;
720 U8 pel_class;
721 U16 pel_locale;
723 struct mpi3mr_drvr_cmd pel_cmds;
724 struct mpi3mr_drvr_cmd pel_abort_cmd;
725 U32 newest_seqnum;
726 void *pel_seq_number;
727 bus_addr_t pel_seq_number_dma;
728 bus_dma_tag_t pel_seq_num_dmatag;
729 bus_dmamap_t pel_seq_num_dmamap;
730 U32 pel_seq_number_sz;
732 struct selinfo mpi3mr_select;
733 U32 mpi3mr_poll_waiting;
734 U32 mpi3mr_aen_triggered;
736 U16 wait_for_port_enable;
737 U16 track_mapping_events;
738 U16 pending_map_events;
739 mpi3mr_atomic_t fw_outstanding;
740 mpi3mr_atomic_t pend_ioctls;
741 struct proc *watchdog_thread;
765 mpi3mr_regread64(struct mpi3mr_softc *sc, uint32_t offset) in mpi3mr_regread64() argument