Lines Matching defs:RegisterClasses

137   const auto &RegisterClasses = Bank.getRegClasses();
138   if (!RegisterClasses.empty()) {
141     assert(RegisterClasses.size() <= 0xffff &&
148     for (const auto &RC : RegisterClasses)
1000   const auto &RegisterClasses = RegBank.getRegClasses();
1008   for (const auto &RC : RegisterClasses) {
1044   for (const auto &RC : RegisterClasses) {
1089      << RegisterClasses.size() << ", " << TargetName << "RegUnitRoots, "
1161   const auto &RegisterClasses = RegBank.getRegClasses();
1162   if (llvm::any_of(RegisterClasses,
1170   if (!RegisterClasses.empty()) {
1171     OS << "namespace " << RegisterClasses.front().Namespace
1174     for (const auto &RC : RegisterClasses) {
1180     OS << "} // end namespace " << RegisterClasses.front().Namespace << "\n\n";
1203   const auto &RegisterClasses = RegBank.getRegClasses();
1210   for (const auto &RC : RegisterClasses) {
1223     for (const auto &RC : RegisterClasses) {
1270   if (!RegisterClasses.empty()) {
1281       for (const auto &RC : RegisterClasses) {
1321     SmallVector<IdxList, 8> SuperRegIdxLists(RegisterClasses.size());
1323     BitVector MaskBV(RegisterClasses.size());
1325     for (const auto &RC : RegisterClasses) {
1353     for (const auto &RC : RegisterClasses) {
1368     for (const auto &RC : RegisterClasses) {
1400     OS << "\nnamespace " << RegisterClasses.front().Namespace
1403     for (const auto &RC : RegisterClasses) {
1428     OS << "} // end namespace " << RegisterClasses.front().Namespace << "\n";
1432   OS << "  const TargetRegisterClass *const RegisterClasses[] = {\n";
1433   for (const auto &RC : RegisterClasses)
1504     if (RegisterClasses.size() <= UINT8_MAX)
1506     else if (RegisterClasses.size() <= UINT16_MAX)
1510     OS << RegisterClasses.size() << "][" << SubRegIndicesSize << "] = {\n";
1511     for (const auto &RC : RegisterClasses) {
1535     if (RegisterClasses.size() <= UINT8_MAX)
1537     else if (RegisterClasses.size() <= UINT16_MAX)
1542     OS << RegisterClasses.size() << "][" << SubRegIndicesSize << "] = {\n";
1544     for (const auto &RC : RegisterClasses) {
1579   if (!RegisterClasses.empty()) {
1582     for (const auto &RC : RegisterClasses) {
1626             "  return RegisterClasses[RCID];\n"
1648      << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() << ",\n"
1656      << "MCRegisterClasses, " << RegisterClasses.size() << ",\n"