Lines Matching defs:LowOpcode

96   unsigned LowOpcode = getOpcodeForOffset(NewOpcode, LowOffsetOp.getImm());
97   assert(HighOpcode && LowOpcode && "Both offsets should be in range");
99   LowPartMI->setDesc(get(LowOpcode));
149 // MI is an RI-style pseudo instruction.  Replace it with LowOpcode
151 // is a high GR32.  ConvertHigh is true if LowOpcode takes a signed operand
153 // MI has the same kind of operand as LowOpcode, so needs to be converted
155 void SystemZInstrInfo::expandRIPseudo(MachineInstr &MI, unsigned LowOpcode,
160   MI.setDesc(get(IsHigh ? HighOpcode : LowOpcode));
167 // followed by HighOpcode or LowOpcode, depending on whether the target
169 void SystemZInstrInfo::expandRIEPseudo(MachineInstr &MI, unsigned LowOpcode,
185     MI.setDesc(get(DestIsHigh ? HighOpcode : LowOpcode));
190 // MI is an RXY-style pseudo instruction.  Replace it with LowOpcode
193 void SystemZInstrInfo::expandRXYPseudo(MachineInstr &MI, unsigned LowOpcode,
197       SystemZ::isHighReg(Reg) ? HighOpcode : LowOpcode,
203 // (source or destination) operand.  Replace it with LowOpcode if the
205 void SystemZInstrInfo::expandLOCPseudo(MachineInstr &MI, unsigned LowOpcode,
208   unsigned Opcode = SystemZ::isHighReg(Reg) ? HighOpcode : LowOpcode;
213 // of one GRX32 into another.  Replace it with LowOpcode if both operands
215 void SystemZInstrInfo::expandZExtPseudo(MachineInstr &MI, unsigned LowOpcode,
219                MI.getOperand(0).getReg(), MI.getOperand(1).getReg(), LowOpcode,