Lines Matching refs:Encoding

367   APInt Encoding, Scratch;
368   getBinaryCodeForInstr(MI, Fixups, Encoding, Scratch,  STI);
377     Encoding |= getImplicitOpSelHiEncoding(Opcode);
387     assert((Encoding & 0xFF) == 0);
388     Encoding |= MRI.getEncodingValue(AMDGPU::EXEC_LO) &
393     CB.push_back((uint8_t)Encoding.extractBitsAsZExtValue(8, 8 * i));
407       getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), Encoding, Fixups,
409       CB.push_back((uint8_t)Encoding.getLimitedValue());
651     uint16_t Encoding = MRI.getEncodingValue(MO.getReg());
652     unsigned RegIdx = Encoding & AMDGPU::HWEncoding::REG_IDX_MASK;
653     bool IsHi = Encoding & AMDGPU::HWEncoding::IS_HI;
654     bool IsVGPR = Encoding & AMDGPU::HWEncoding::IS_VGPR_OR_AGPR;
706   llvm_unreachable("Encoding of this operand type is not supported yet.");