Lines Matching defs:ExtVT
746 /// true if the (and (load x) c) pattern matches an extload. ExtVT returns
749 EVT LoadResultTy, EVT &ExtVT);
752 /// width reduced to ExtVT.
6418 EVT LoadResultTy, EVT &ExtVT) {
6424 ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits);
6427 if (ExtVT == LoadedVT &&
6429 TLI.isLoadExtLegal(ISD::ZEXTLOAD, LoadResultTy, ExtVT))) {
6441 if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound())
6445 !TLI.isLoadExtLegal(ISD::ZEXTLOAD, LoadResultTy, ExtVT))
6448 if (!TLI.shouldReduceLoadWidth(LoadN, ISD::ZEXTLOAD, ExtVT))
6567 EVT ExtVT;
6568 if (isAndLoadExtLoad(Mask, Load, Load->getValueType(0), ExtVT) &&
6569 isLegalNarrowLdSt(Load, ISD::ZEXTLOAD, ExtVT)) {
6573 ExtVT.bitsGE(Load->getMemoryVT()))
6577 if (ExtVT.bitsLE(Load->getMemoryVT()))
6587 EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits);
6594 if (ExtVT.bitsGE(VT))
6982 EVT ExtVT = VT;
6983 if (TLI.isLoadExtLegal(ISD::ZEXTLOAD, ExtVT, LoadVT)) {
6991 ExtVT, DL, MLoad->getChain(), MLoad->getBasePtr(),
7190 EVT ExtVT = Ext->getValueType(0);
7195 (!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, ExtVT))) {
7199 DAG.getNode(ISD::ZERO_EXTEND, DL, ExtVT, Extendee);
11012 EVT ExtVT = cast<VTSDNode>(N0.getOperand(1))->getVT();
11013 if (TLI.isTruncateFree(VT, ExtVT) && TLI.isZExtFree(ExtVT, VT) &&
11014 TLI.isTypeDesirableForOp(ISD::ABS, ExtVT) &&
11015 hasOperation(ISD::ABS, ExtVT)) {
11018 DAG.getNode(ISD::ABS, DL, ExtVT,
11019 DAG.getNode(ISD::TRUNCATE, DL, ExtVT, N0.getOperand(0))));
13596 EVT ExtVT = cast<VTSDNode>(N0->getOperand(1))->getVT();
13597 if ((N00.getOpcode() == ISD::TRUNCATE || TLI.isTruncateFree(N00, ExtVT)) &&
13598 (!LegalTypes || TLI.isTypeLegal(ExtVT))) {
13599 SDValue T = DAG.getNode(ISD::TRUNCATE, DL, ExtVT, N00);
14013 EVT ExtVT;
14014 if (isAndLoadExtLoad(AndC, LN00, LoadResultTy, ExtVT))
14430 EVT ExtVT = VT;
14445 // Special case: SIGN_EXTEND_INREG is basically truncating to ExtVT then
14449 ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT();
14469 ExtVT = EVT::getIntegerVT(*DAG.getContext(), MemoryWidth - ShAmt);
14495 ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits);
14498 // In case Opc==SRL we've already prepared ExtVT/ExtType/ShAmt based on doing
14500 // ExtVT even further based on "a masking AND". We could also end up here for
14539 if (ExtVT.getScalarSizeInBits() > MemoryWidth - ShAmt) {
14545 ExtVT = EVT::getIntegerVT(*DAG.getContext(), MemoryWidth - ShAmt);
14549 // the ExtVT to make the AND redundant.
14559 if ((ExtVT.getScalarSizeInBits() > MaskedVT.getScalarSizeInBits()) &&
14561 ExtVT = MaskedVT;
14568 if (((Offset + ActiveBits) <= ExtVT.getScalarSizeInBits()) &&
14570 ExtVT = MaskedVT;
14587 ExtVT == VT && TLI.isNarrowingProfitable(N0.getValueType(), VT)) {
14602 !isLegalNarrowLdSt(LN0, ExtType, ExtVT, ShAmt))
14608 unsigned EVTStoreBits = ExtVT.getStoreSizeInBits().getFixedValue();
14634 LN0->getPointerInfo().getWithOffset(PtrOff), ExtVT,
14674 EVT ExtVT = cast<VTSDNode>(N1)->getVT();
14676 unsigned ExtVTBits = ExtVT.getScalarSizeInBits();
14692 ExtVT.bitsLT(cast<VTSDNode>(N0.getOperand(1))->getVT()))
14738 return DAG.getZeroExtendInReg(N0, SDLoc(N), ExtVT);
14771 ExtVT == cast<LoadSDNode>(N0)->getMemoryVT() &&
14774 TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, ExtVT))) {
14778 LN0->getBasePtr(), ExtVT,
14789 ExtVT == cast<LoadSDNode>(N0)->getMemoryVT() &&
14791 TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, ExtVT))) {
14795 LN0->getBasePtr(), ExtVT,
14805 if (ExtVT == Ld->getMemoryVT() && N0.hasOneUse() &&
14807 TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, ExtVT)) {
14810 Ld->getMask(), Ld->getPassThru(), ExtVT, Ld->getMemOperand(),
14821 ExtVT == GN0->getMemoryVT() &&
14827 DAG.getVTList(VT, MVT::Other), ExtVT, SDLoc(N), Ops,
14965 EVT ExtVT = cast<VTSDNode>(ExtVal)->getVT();
14966 if (ExtVT.bitsLT(VT) && TLI.preferSextInRegOfTruncate(VT, SrcVT, ExtVT)) {
22764 EVT ExtVT = VecVT.getVectorElementType();
22765 EVT LVT = ExtVT;
22775 if (!BCVT.isVector() || ExtVT.bitsGT(BCVT.getVectorElementType()))
22780 ExtVT = BCVT.getVectorElementType();
22805 VecOp.getOperand(0).getValueType() == ExtVT &&
23966 EVT ExtVT = ExtVec.getValueType();
23977 if (ExtVT.getSizeInBits() != VT.getSizeInBits())
23981 int NumExtElts = ExtVT.getVectorNumElements();