Lines Matching defs:LaneMask

156     /// A LaneMask to remember on which subregister live ranges we need to call
260     /// LaneMask are split as necessary. @p LaneMask are the lanes that
264                            LaneBitmask LaneMask, CoalescerPair &CP,
270                           LaneBitmask LaneMask, const CoalescerPair &CP);
1001       MaskA |= SA.LaneMask;
1004           Allocator, SA.LaneMask,
1021       if ((SB.LaneMask & MaskA).any())
1259     IntB.computeSubRangeUndefs(Undefs, SR.LaneMask, *MRI,
1492       SR.LaneMask = TRI->composeSubRegIndexLaneMask(DstIdx, SR.LaneMask);
1527         MaxMask &= ~SR.LaneMask;
1552         if ((SR.LaneMask & DstMask).none()) {
1555                      << PrintLaneMask(SR.LaneMask) << " : " << SR << "\n");
1692       if ((SR.LaneMask & SrcMask).none())
1740       if ((SR.LaneMask & DstMask).none())
1762         if ((SR.LaneMask & UseMask).none())
1797     if ((S.LaneMask & Mask).none())
2045             PrunedLanes |= S.LaneMask;
2176       if ((S.LaneMask & ShrinkMask).none())
2178       LLVM_DEBUG(dbgs() << "Shrink LaneUses (Lane " << PrintLaneMask(S.LaneMask)
2417   /// The LaneMask that this liverange will occupy the coalesced register. May
2419   const LaneBitmask LaneMask;
2589   JoinVals(LiveRange &LR, Register Reg, unsigned SubIdx, LaneBitmask LaneMask,
2593       : LR(LR), Reg(Reg), SubIdx(SubIdx), LaneMask(LaneMask),
2689         LaneBitmask SMask = TRI->composeSubRegIndexLaneMask(SubIdx, S.LaneMask);
2690         if ((SMask & LaneMask).none())
2978     // any conflict bit in their LaneMask.
2989           TRI->composeSubRegIndexLaneMask(Other.SubIdx, OtherSR.LaneMask);
3134                       << ' ' << PrintLaneMask(LaneMask) << '\n');
3344         LLVM_DEBUG(dbgs() << "\t\tPrune sublane " << PrintLaneMask(S.LaneMask)
3362           ShrinkMask |= S.LaneMask;
3374                           << PrintLaneMask(S.LaneMask) << " at " << Def
3376         ShrinkMask |= S.LaneMask;
3515                                          LaneBitmask LaneMask,
3518   JoinVals RHSVals(RRange, CP.getSrcReg(), CP.getSrcIdx(), LaneMask,
3520   JoinVals LHSVals(LRange, CP.getDstReg(), CP.getDstIdx(), LaneMask,
3558   LLVM_DEBUG(dbgs() << "\t\tjoined lanes: " << PrintLaneMask(LaneMask)
3579                                           LaneBitmask LaneMask,
3584       Allocator, LaneMask,
3591           joinSubRegRanges(SR, RangeCopy, SR.LaneMask, CP);
3648         LaneBitmask Mask = TRI->composeSubRegIndexLaneMask(DstIdx, R.LaneMask);
3649         R.LaneMask = Mask;
3664         LaneBitmask Mask = TRI->composeSubRegIndexLaneMask(SrcIdx, R.LaneMask);
4281             assert((S.LaneMask & ~MaxMask).none());