Improve the controller state check in xhci_reset

From FreeBSD, OK mpi

Do not truncate possible remaining transfer length.

Reported by Takahiro HAYASHI on bugs@, thanks!

Do not try to stop and reset endpoints if USB transfers are aborted
because the HC has been shut down (during suspend/hibernate) or
removed (PCIe card).

In both cases the hardware wont complete the

Do not try to stop and reset endpoints if USB transfers are aborted
because the HC has been shut down (during suspend/hibernate) or
removed (PCIe card).

In both cases the hardware wont complete the commands, resulting in
timeouts. Instead just do the software part of the abort process.

Unbreak suspend/resume with USB a device connected to xhci(4) as
reported by Fabian Raetz on bugs@.

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Do not trust the content of event TRBs coming from the hardware and
maintain a list of possibly submitted commands.

Complete synchronous abort method modeled after the existing ones.

Because our USB stack wants the aborted xfer to be removed from the
pipe during abort(), we have to sleep in the abort function.

R

Complete synchronous abort method modeled after the existing ones.

Because our USB stack wants the aborted xfer to be removed from the
pipe during abort(), we have to sleep in the abort function.

Regarding the xHCI process, when a TD is being aborted, we simply stop
the endpoint and then move the dequeue pointer past its last TRB. This
is fairly simple for the moment since only one xfer can be pending on a
given pipe.

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Since we are no longer resetting rings when a Babble or Stall condition
is detected, simply keep track of the faulty xfer instead of completing
all the pending ones.

Fix a race condition where we co

Since we are no longer resetting rings when a Babble or Stall condition
is detected, simply keep track of the faulty xfer instead of completing
all the pending ones.

Fix a race condition where we could end up aborting a freshly enqueued
xfer when two different threads are submitting control transfers (i.e.
usbdevs(8) and a kernel driver).

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Split the consumer & producer logic into two different functions in
order to read last TRB of the event ring.

Fix a bug introduced in r1.1.

Properly unwind from a failure in usbd_dma_contig_alloc(). Calling
bus_dmamap_unload(9) on a map that failed to load is a bad idea and causes
panics on some architectures (such as sparc64).

ok mpi@

Prevent a race condition upon resume by adding a supplementary delay.

This is a workaround needed at least by Renesas controllers. I didn't
find any documentation about this issue and I guess other

Prevent a race condition upon resume by adding a supplementary delay.

This is a workaround needed at least by Renesas controllers. I didn't
find any documentation about this issue and I guess other open source
xHCI implementations do not see this race because they do much more work
upon resume.

Thanks to Remi Locherer for reporting this issue on bugs@.

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Only set the status of a completed xfer just before giving it back to
the stack. This will allow stricter checks when aborting transfers.

While here update a comment about short transfer and multi-

Only set the status of a completed xfer just before giving it back to
the stack. This will allow stricter checks when aborting transfers.

While here update a comment about short transfer and multi-TRB TD since
bulk transfers can also use a chain now.

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When chaining TRBs, calculate the TD Size as described in section
4.11.2.4 instead of using one TRB per packet. Also make sure that
it is not greater than 31.

While here be paranoid about xfer buff

When chaining TRBs, calculate the TD Size as described in section
4.11.2.4 instead of using one TRB per packet. Also make sure that
it is not greater than 31.

While here be paranoid about xfer buffer crossing a 64k boundary
and use a supplementary TRB in such case.

Fix a problem with uplcom(4) on Intel xHCI reported by jasper@.

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Various transfer improvements/fixes.

Chain TRBs when submitting bulk or interrupt transfers with a length
bigger than the Maxium Packet Size of the endpoint.

Append a supplementary TRB if a zero le

Various transfer improvements/fixes.

Chain TRBs when submitting bulk or interrupt transfers with a length
bigger than the Maxium Packet Size of the endpoint.

Append a supplementary TRB if a zero length packet is required.

While here, set the flags of each TRB at once. Even if this driver
implementation fills the first TRB of a chain last, be safe and make
sure the hardware wont miss any flag.

Note that with this change, DMA sync operations might not cover the
whole chain, just like for control transfers, if the ring is starting
over.

Previous version of this diff tested by Peter N. M. Hansteen, thanks!

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Use a bitmask when dumping TRB flags. No change in !XHCI_DEBUG.

Use <sys/endian.h> instead of <machine/endian.h>

ok dlg@ mpi@ bcook@ millert@ miod@

Stop using usb_{alloc,free}mem() for the rings and internal structures.

Since xhci(4) does not allocate memory for its rings in interrupt
context, it has no use for the free lists offered by the USB

Stop using usb_{alloc,free}mem() for the rings and internal structures.

Since xhci(4) does not allocate memory for its rings in interrupt
context, it has no use for the free lists offered by the USB memory
allocator.

Using bus_dmamem_alloc(9) and friends also allows us to respect the
boundary requirement for the various structures specified in Table 54.

While here make use of defines for every alignment and boundary
requirements which are different than a page size.

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When resetting an endpoint do not purge the ring. Instead set the
dequeue pointer past the last enqueued TRB and let xhci_xfer_done()
properly accounts free TRBs.

No point in setting the Interrupt-on Short Packet bit on OUT endpoint.
As explained in section 4.11.7 it should be used when a device is
allowed to supply less data than the provided buffer space.

In debug mode, print more information when a transfer is aborted and use
a different index value for a chained TRB and a freed one.

Be less verbose when opening a pipe and print the endpoint & slot
when submitting a command. No change for non-XHCI_DEBUG kernel.

Two fixes to make Qemu and VMware xHCI implementations work:

1. Always unmask the slot context for the "Set Address" command.

2. Use the right spl when submitting a transfer to prevent from
sett

Two fixes to make Qemu and VMware xHCI implementations work:

1. Always unmask the slot context for the "Set Address" command.

2. Use the right spl when submitting a transfer to prevent from
setting up a timer on an already completed xfer.

Analyzed with and ok jsg@

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Do not reset the base address of the control endpoint's ring when
the second "Set Address" command is issued. This would lead the
HC to reprocess TRBs corresponding to completed transfers.

This was

Do not reset the base address of the control endpoint's ring when
the second "Set Address" command is issued. This would lead the
HC to reprocess TRBs corresponding to completed transfers.

This was the cause of the "xhci0: NULL xfer pointer" message that
could be seen after attaching a device and reported by naddy@.

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Support USB 1.x devices below external hubs.

This code is violating various layers of abstraction, just like ehci(4)
does. Transaction translators need a bit more love.

Apparently xhci(4) also needs a hook to set the address of a device.

Some Low/Full speed devices do not like to get a SET_ADDRESS command
before we have read (some bits of) their device descriptor.

Apparently xhci(4) also needs a hook to set the address of a device.

Some Low/Full speed devices do not like to get a SET_ADDRESS command
before we have read (some bits of) their device descriptor. So change
the attach logic to issue two "Device Address" command with a BSR dance.

This should fix the "device problem, disabling port" error seen on root
hubs with some Low/Full speed devices, reported by miod@.

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When a pipe is closed, clear the memory of the corresponding enpoint
context, not the whole array of endpoints. Yeah, pointers are hard.

Fix a panic reported by Dimitris Papastamos on tech@

Document how the Slot States transitions described in section 4.5.3 of
xHCI specification r1.1 are handled in this implementation. This is a
bit tricky because our bus interface is pipe-oriented. H

Document how the Slot States transitions described in section 4.5.3 of
xHCI specification r1.1 are handled in this implementation. This is a
bit tricky because our bus interface is pipe-oriented. Hopefully this
will help other people squash the remaining bugs in this area.

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