Revision tags: llvmorg-7.0.1-rc2, llvmorg-7.0.1-rc1, llvmorg-7.0.0, llvmorg-7.0.0-rc3, llvmorg-7.0.0-rc2, llvmorg-7.0.0-rc1 |
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db3e5443 |
| 02-Aug-2018 |
Krzysztof Parzyszek <kparzysz@codeaurora.org> |
[Unittests] Fix returning string in SolveQuadraticEquationWrap
Returning a Twine caused runtime failures. Convert it to std::string before retuning.
llvm-svn: 338768
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90f3249c |
| 02-Aug-2018 |
Krzysztof Parzyszek <kparzysz@codeaurora.org> |
[SCEV] Properly solve quadratic equations
Differential Revision: https://reviews.llvm.org/D48283
llvm-svn: 338758
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55a0dcee |
| 19-Jul-2018 |
Krzysztof Parzyszek <kparzysz@codeaurora.org> |
[APInt] Keep the original bit width in quotient and remainder
Some trivial cases in udivrem were handled by directly assigning 0 or 1 to APInt objects. This would set the bit width to 1, instead of
[APInt] Keep the original bit width in quotient and remainder
Some trivial cases in udivrem were handled by directly assigning 0 or 1 to APInt objects. This would set the bit width to 1, instead of the bit width of the inputs. A potentially undesirable side effect of that is that with the bit width of 1, 1 equals -1.
Differential Revision: https://reviews.llvm.org/D49554
llvm-svn: 337478
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802c31cc |
| 25-Jun-2018 |
Tim Shen <timshen91@gmail.com> |
[APInt] Add helpers for rounding u/sdivs.
Reviewers: sanjoy, craig.topper
Subscribers: jlebar, hiraditya, bixia, llvm-commits
Differential Revision: https://reviews.llvm.org/D48498
llvm-svn: 3355
[APInt] Add helpers for rounding u/sdivs.
Reviewers: sanjoy, craig.topper
Subscribers: jlebar, hiraditya, bixia, llvm-commits
Differential Revision: https://reviews.llvm.org/D48498
llvm-svn: 335557
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Revision tags: llvmorg-6.0.1, llvmorg-6.0.1-rc3, llvmorg-6.0.1-rc2 |
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51760397 |
| 24-Apr-2018 |
Reid Kleckner <rnk@google.com> |
Bring back APInt self-move assignment check for MSVC only
Summary: It was removed about a year ago in r300477. Bring it back, along with its unittest, when the MSVC STL is in use. The MSVC STL perfo
Bring back APInt self-move assignment check for MSVC only
Summary: It was removed about a year ago in r300477. Bring it back, along with its unittest, when the MSVC STL is in use. The MSVC STL performs self-assignment in std::shuffle. These days, llvm::sort calls std::shuffle when expensive checks are enabled to help find non-determinism bugs.
Reviewers: craig.topper, chandlerc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46028
llvm-svn: 330776
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Revision tags: llvmorg-6.0.1-rc1, llvmorg-5.0.2, llvmorg-5.0.2-rc2, llvmorg-5.0.2-rc1, llvmorg-6.0.0, llvmorg-6.0.0-rc3 |
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89337750 |
| 16-Feb-2018 |
Tim Shen <timshen91@gmail.com> |
[APInt] Fix extractBits to correctly handle Result.isSingleWord() case.
Summary: extractBits assumes that `!this->isSingleWord() implies !Result.isSingleWord()`, which may not necessarily be true. H
[APInt] Fix extractBits to correctly handle Result.isSingleWord() case.
Summary: extractBits assumes that `!this->isSingleWord() implies !Result.isSingleWord()`, which may not necessarily be true. Handle both cases.
Reviewers: RKSimon
Subscribers: sanjoy, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D43363
llvm-svn: 325311
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Revision tags: llvmorg-6.0.0-rc2, llvmorg-6.0.0-rc1, llvmorg-5.0.1, llvmorg-5.0.1-rc3, llvmorg-5.0.1-rc2, llvmorg-5.0.1-rc1, llvmorg-5.0.0, llvmorg-5.0.0-rc5, llvmorg-5.0.0-rc4, llvmorg-5.0.0-rc3, llvmorg-5.0.0-rc2, llvmorg-5.0.0-rc1, llvmorg-4.0.1, llvmorg-4.0.1-rc3, llvmorg-4.0.1-rc2 |
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8885f933 |
| 19-May-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] Add support for dividing or remainder by a uint64_t or int64_t.
Summary: This patch adds udiv/sdiv/urem/srem/udivrem/sdivrem methods that can divide by a uint64_t. This makes division consis
[APInt] Add support for dividing or remainder by a uint64_t or int64_t.
Summary: This patch adds udiv/sdiv/urem/srem/udivrem/sdivrem methods that can divide by a uint64_t. This makes division consistent with all the other arithmetic operations.
This modifies the interface of the divide helper method to work on raw arrays instead of APInts. This way we can pass the uint64_t in for the RHS without wrapping it in an APInt. This required moving all the Quotient and Remainder allocation handling up to the callers. For udiv/urem this was as simple as just creating the Quotient/Remainder with the right size when they were declared. For udivrem we have to rely on reallocate not changing the contents of the variable LHS or RHS is aliased with the Quotient or Remainder APInts. We also have to zero the upper bits of Remainder and Quotient that divide doesn't write to if lhsWords/rhsWords is smaller than the width.
I've update the toString method to use the new udivrem.
Reviewers: hans, dblaikie, RKSimon
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D33310
llvm-svn: 303431
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a51941f3 |
| 08-May-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] Add support for multiplying by a uint64_t.
This makes multiply similar to add, sub, xor, and, and or.
llvm-svn: 302402
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7f7d1200 |
| 30-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] Remove support for wrapping from APInt::setBits.
This features isn't used anywhere in tree. It's existence seems to be preventing selfhost builds from inlining any of the setBits methods inc
[APInt] Remove support for wrapping from APInt::setBits.
This features isn't used anywhere in tree. It's existence seems to be preventing selfhost builds from inlining any of the setBits methods including setLowBits, setHighBits, and setBitsFrom. This is because the code makes the method recursive.
If anyone needs this feature in the future we could consider adding a setBitsWithWrap method. This way only the calls that need it would pay for it.
llvm-svn: 301769
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Revision tags: llvmorg-4.0.1-rc1 |
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8b37326a |
| 24-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] Add ashrInPlace method and rewrite ashr to make a copy and then call ashrInPlace.
This patch adds an in place version of ashr to match lshr and shl which were recently added.
I've tried to
[APInt] Add ashrInPlace method and rewrite ashr to make a copy and then call ashrInPlace.
This patch adds an in place version of ashr to match lshr and shl which were recently added.
I've tried to make this similar to the lshr code with additions to handle the sign extension. I've also tried to do this with less if checks than the current ashr code by sign extending the original result to a word boundary before doing any of the shifting. This removes a lot of the complexity of determining where to fill in sign bits after the shifting.
Differential Revision: https://reviews.llvm.org/D32415
llvm-svn: 301198
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fc03d2d2 |
| 24-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] Make behavior of ashr by BitWidth consistent between single and multi word.
Previously single word would always return 0 regardless of the original sign. Multi word would return all 0s or al
[APInt] Make behavior of ashr by BitWidth consistent between single and multi word.
Previously single word would always return 0 regardless of the original sign. Multi word would return all 0s or all 1s based on the original sign. Now single word takes into account the sign as well.
llvm-svn: 301159
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652ca996 |
| 23-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] In sext single word case, use SignExtend64 and let the APInt constructor mask off any excess bits.
The current code is trying to be clever with shifts to avoid needing to clear unused bits.
[APInt] In sext single word case, use SignExtend64 and let the APInt constructor mask off any excess bits.
The current code is trying to be clever with shifts to avoid needing to clear unused bits. But it looks like the compiler is unable to optimize out the unused bit handling in the APInt constructor. Given this its better to just use SignExtend64 and have more readable code.
llvm-svn: 301133
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cc4a9120 |
| 23-Apr-2017 |
Renato Golin <renato.golin@linaro.org> |
Revert "[APInt] Add ashrInPlace method and implement ashr using it. Also fix a bug in the shift by BitWidth handling."
This reverts commit r301094, as it broke all ARM self-hosting bots.
PR32754.
Revert "[APInt] Add ashrInPlace method and implement ashr using it. Also fix a bug in the shift by BitWidth handling."
This reverts commit r301094, as it broke all ARM self-hosting bots.
PR32754.
llvm-svn: 301110
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26af2a99 |
| 22-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] Add ashrInPlace method and implement ashr using it. Also fix a bug in the shift by BitWidth handling.
For single word, shift by BitWidth was always returning 0, but for multiword it was base
[APInt] Add ashrInPlace method and implement ashr using it. Also fix a bug in the shift by BitWidth handling.
For single word, shift by BitWidth was always returning 0, but for multiword it was based on original sign. Now single word matches multi word.
llvm-svn: 301094
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a8129a11 |
| 20-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] Add isSubsetOf method that can check if one APInt is a subset of another without creating temporary APInts
This question comes up in many places in SimplifyDemandedBits. This makes it easy t
[APInt] Add isSubsetOf method that can check if one APInt is a subset of another without creating temporary APInts
This question comes up in many places in SimplifyDemandedBits. This makes it easy to ask without allocating additional temporary APInts.
The BitVector class provides a similar functionality through its (IMHO badly named) test(const BitVector&) method. Though its output polarity is reversed.
I've provided one example use case in this patch. I plan to do more as a follow up.
Differential Revision: https://reviews.llvm.org/D32258
llvm-svn: 300851
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4db0c693 |
| 20-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
Recommit "[APInt] Add back the asserts that check that the APInt shift methods aren't called with values larger than BitWidth."
This includes a fix to clamp a right shift of larger than BitWidth in
Recommit "[APInt] Add back the asserts that check that the APInt shift methods aren't called with values larger than BitWidth."
This includes a fix to clamp a right shift of larger than BitWidth in DAG combining.
llvm-svn: 300816
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6fd0a5c9 |
| 20-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
Revert r300811 "[APInt] Add back the asserts that check that the APInt shift methods aren't called with values larger than BitWidth."
This is failing a self host debug build.
llvm-svn: 300813
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e49252ce |
| 20-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] Add back the asserts that check that the APInt shift methods aren't called with values larger than BitWidth.
The underlying tcShiftRight/tcShiftLeft functions support the larger bit widths b
[APInt] Add back the asserts that check that the APInt shift methods aren't called with values larger than BitWidth.
The underlying tcShiftRight/tcShiftLeft functions support the larger bit widths but the APInt interface shouldn't rely on that.
llvm-svn: 300811
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a8a4f0db |
| 18-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] Make operator<<= shift in place. Improve the implementation of tcShiftLeft and use it to implement operator<<=.
llvm-svn: 300526
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9575d8ff |
| 17-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] Merge the multiword code from lshrInPlace and tcShiftRight into a single implementation
This merges the two different multiword shift right implementations into a single version located in t
[APInt] Merge the multiword code from lshrInPlace and tcShiftRight into a single implementation
This merges the two different multiword shift right implementations into a single version located in tcShiftRight. lshrInPlace now calls tcShiftRight for the multiword case.
I retained the memmove fast path from lshrInPlace and used a memset for the zeroing. The for loop is basically tcShiftRight's implementation with the zeroing and the intra-shift of 0 removed.
Differential Revision: https://reviews.llvm.org/D32114
llvm-svn: 300503
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7abfbdf8 |
| 17-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] Remove self move check from move assignment operator
This was added to work around a bug in MSVC 2013's implementation of stable_sort. That bug has been fixed as of MSVC 2015 so we shouldn't
[APInt] Remove self move check from move assignment operator
This was added to work around a bug in MSVC 2013's implementation of stable_sort. That bug has been fixed as of MSVC 2015 so we shouldn't need this anymore.
Technically the current implementation has undefined behavior because we only protect the deleting of the pVal array with the self move check. There is still a memcpy of that.VAL to VAL that isn't protected. In the case of self move those are the same local and memcpy is undefined for src and dst overlapping.
This reduces the size of the opt binary on my local x86-64 build by about 4k.
Differential Revision: https://reviews.llvm.org/D32116
llvm-svn: 300477
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9edfb08d |
| 16-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] Fix a bug in lshr by a value more than 64 bits above the bit width.
This was throwing an assert because we determined the intra-word shift amount by subtracting the size of the full word shi
[APInt] Fix a bug in lshr by a value more than 64 bits above the bit width.
This was throwing an assert because we determined the intra-word shift amount by subtracting the size of the full word shift from the total shift amount. But we failed to account for the fact that we clipped the full word shifts by total words first. To fix this just calculate the intra-word shift as the remainder of dividing by bits per word.
llvm-svn: 300405
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55bd375b |
| 13-Apr-2017 |
Richard Smith <richard-llvm@metafoo.co.uk> |
Remove all allocation and divisions from GreatestCommonDivisor
Switch from Euclid's algorithm to Stein's algorithm for computing GCD. This avoids the (expensive) APInt division operation in favour o
Remove all allocation and divisions from GreatestCommonDivisor
Switch from Euclid's algorithm to Stein's algorithm for computing GCD. This avoids the (expensive) APInt division operation in favour of bit operations. Remove all memory allocation from within the GCD loop by tweaking our `lshr` implementation so it can operate in-place.
Differential Revision: https://reviews.llvm.org/D31968
llvm-svn: 300252
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d33ee1b9 |
| 03-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] Move isMask and isShiftedMask out of APIntOps and into the APInt class. Implement them without memory allocation for multiword
This moves the isMask and isShiftedMask functions to be class m
[APInt] Move isMask and isShiftedMask out of APIntOps and into the APInt class. Implement them without memory allocation for multiword
This moves the isMask and isShiftedMask functions to be class methods. They now use the MathExtras.h function for single word size and leading/trailing zeros/ones or countPopulation for the multiword size. The previous implementation made multiple temorary memory allocations to do the bitwise arithmetic operations to match the MathExtras.h implementation.
Differential Revision: https://reviews.llvm.org/D31565
llvm-svn: 299362
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55229b78 |
| 02-Apr-2017 |
Craig Topper <craig.topper@gmail.com> |
[APInt] Add a public typedef for the internal type of APInt use it instead of integerPart. Make APINT_BITS_PER_WORD and APINT_WORD_SIZE public.
This patch is one step to attempt to unify the main AP
[APInt] Add a public typedef for the internal type of APInt use it instead of integerPart. Make APINT_BITS_PER_WORD and APINT_WORD_SIZE public.
This patch is one step to attempt to unify the main APInt interface and the tc functions used by APFloat.
This patch adds a WordType to APInt and uses that in all the tc functions. I've added temporary typedefs to APFloat to alias it to integerPart to keep the patch size down. I'll work on removing that in a future patch.
In future patches I hope to reuse the tc functions to implement some of the main APInt functionality.
I may remove APINT_ from BITS_PER_WORD and WORD_SIZE constants so that we don't have the repetitive APInt::APINT_ externally.
Differential Revision: https://reviews.llvm.org/D31523
llvm-svn: 299341
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