History log of /llvm-project/llvm/unittests/ADT/APIntTest.cpp (Results 26 – 50 of 188)
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# b6a01caa 03-Dec-2022 Kazu Hirata <kazu@google.com>

[llvm/unittests] Use std::nullopt instead of None (NFC)

This patch mechanically replaces None with std::nullopt where the
compiler would warn if None were deprecated. The intent is to reduce
the am

[llvm/unittests] Use std::nullopt instead of None (NFC)

This patch mechanically replaces None with std::nullopt where the
compiler would warn if None were deprecated. The intent is to reduce
the amount of manual work required in migrating from Optional to
std::optional.

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716

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Revision tags: llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working
# cbdb81e6 04-Oct-2022 Weverything <rtrieu@google.com>

Fix DenseMap with APInt keys

The empty key value for APInt was colliding with a valid zero-width
APInt. Change the internal value of empty key and tombstone values
for APInt to avoid this collision

Fix DenseMap with APInt keys

The empty key value for APInt was colliding with a valid zero-width
APInt. Change the internal value of empty key and tombstone values
for APInt to avoid this collision.

Fixes: https://github.com/llvm/llvm-project/issues/58013

Differential Revision: https://reviews.llvm.org/D135741

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Revision tags: llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init
# 72a23cef 01-Jul-2022 Xiang1 Zhang <xiang1.zhang@intel.com>

[ISel] Match all bits when merge undefs for DAG combine

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D128570


# 64f44a90 01-Jul-2022 Xiang1 Zhang <xiang1.zhang@intel.com>

Revert "[ISel] Match all bits when merge undef(s) for DAG combine"

This reverts commit 5fe5aa284efed1ee1492e1f266351b35f0a8bb69.


# 5fe5aa28 30-Jun-2022 Xiang1 Zhang <xiang1.zhang@intel.com>

[ISel] Match all bits when merge undef(s) for DAG combine


# d152e50c 25-Jun-2022 Kazu Hirata <kazu@google.com>

[llvm] Don't use Optional::{hasValue,getValue} (NFC)


Revision tags: llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1
# 4e432f1b 06-Oct-2021 Jay Foad <jay.foad@amd.com>

[APInt] Deprecate truncOrSelf, zextOrSelf and sextOrSelf

Differential Revision: https://reviews.llvm.org/D125558


# 169ae6db 06-Oct-2021 Jay Foad <jay.foad@amd.com>

[APInt] Allow extending and truncating to the same width

Allow zext, sext, trunc, truncUSat and truncSSat to extend or truncate
to the same bit width, which is a no-op.

Disallowing this forced clie

[APInt] Allow extending and truncating to the same width

Allow zext, sext, trunc, truncUSat and truncSSat to extend or truncate
to the same bit width, which is a no-op.

Disallowing this forced clients to use workarounds like using
zextOrTrunc (even though they never wanted truncation) or zextOrSelf
(even though they did not want its strange behaviour of allowing a
*smaller* bit width, which is also treated as a no-op).

Differential Revision: https://reviews.llvm.org/D125556

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# d1d7188b 08-Feb-2022 Simon Pilgrim <llvm-dev@redking.me.uk>

Fix signed/unsigned comparison warnings on ppc buildbots


# 58f944cf 08-Feb-2022 Simon Pilgrim <llvm-dev@redking.me.uk>

Fix signed/unsigned comparison warnings on ppc buildbots


# fd2bb51f 08-Feb-2022 Simon Pilgrim <llvm-dev@redking.me.uk>

[ADT] Add APInt/MathExtras isShiftedMask variant returning mask offset/length

In many cases, calls to isShiftedMask are immediately followed with checks to determine the size and position of the bit

[ADT] Add APInt/MathExtras isShiftedMask variant returning mask offset/length

In many cases, calls to isShiftedMask are immediately followed with checks to determine the size and position of the bitmask.

This patch adds variants of APInt::isShiftedMask, isShiftedMask_32 and isShiftedMask_64 that return these values as additional arguments.

I've updated a number of cases that were either performing seperate size/position calculations or had created their own local wrapper versions of these.

Differential Revision: https://reviews.llvm.org/D119019

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# 63f417ef 30-Nov-2021 Schuyler Eldridge <schuyler.eldridge@sifive.com>

[ADT] Remove 0-width Asserts in APInt.getZExtValue

Remove assertion that disallows getting a zero-extended value from a
zero-width APInt. This check is too restrictive and makes it difficult
to use

[ADT] Remove 0-width Asserts in APInt.getZExtValue

Remove assertion that disallows getting a zero-extended value from a
zero-width APInt. This check is too restrictive and makes it difficult
to use APInt to model zero-width things, e.g., zero-width wires in the
CIRCT project.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

Reviewed By: lattner, darthscsi, nikic

Differential Revision: https://reviews.llvm.org/D114768

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# 71e39e3f 19-Oct-2021 Simon Pilgrim <llvm-dev@redking.me.uk>

[ADT] Add APInt::isNegatedPowerOf2() helper

Inspired by D111968, provide a isNegatedPowerOf2() wrapper instead of obfuscating code with (-Value).isPowerOf2() patterns, which I'm sure are likely aven

[ADT] Add APInt::isNegatedPowerOf2() helper

Inspired by D111968, provide a isNegatedPowerOf2() wrapper instead of obfuscating code with (-Value).isPowerOf2() patterns, which I'm sure are likely avenues for typos.....

Differential Revision: https://reviews.llvm.org/D111998

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# 31d3c0b3 18-Oct-2021 Simon Pilgrim <llvm-dev@redking.me.uk>

[ADT] Fix Wshift-overflow gcc warning in isPowerOf2 unit test


# ac1c0dd3 18-Oct-2021 Simon Pilgrim <llvm-dev@redking.me.uk>

[ADT] Add some basic APInt::isPowerOf2() unit test coverage


# 492a4a42 16-Oct-2021 Nikita Popov <nikita.ppv@gmail.com>

[APInt] Fix 1-bit edge case in smul_ov()

The sdiv used to check for overflow can itself overflow if the
LHS is signed min and the RHS is -1. The code tried to account for
this by also checking the c

[APInt] Fix 1-bit edge case in smul_ov()

The sdiv used to check for overflow can itself overflow if the
LHS is signed min and the RHS is -1. The code tried to account for
this by also checking the commuted version. However, for 1-bit
values, signed min and -1 are the same value, so both divisions
overflow. As such, the overflow for -1 * -1 was not detected
(which results in -1 rather than 1 for 1-bit values). Fix this by
explicitly checking for this case instead.

Noticed while adding exhaustive test coverage for smul_ov(),
which is also part of this commit.

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# ad37a45a 06-Oct-2021 Chris Lattner <clattner@nondot.org>

[APInt] Fix isAllOnes and extractBits for zero width values.

isAllOnes() should return true for zero bit values because
there are no zeros in it.

Thanks to Jay Foad for pointing this out.

Differen

[APInt] Fix isAllOnes and extractBits for zero width values.

isAllOnes() should return true for zero bit values because
there are no zeros in it.

Thanks to Jay Foad for pointing this out.

Differential Revision: https://reviews.llvm.org/D111241

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# cc697fc2 05-Oct-2021 Chris Lattner <clattner@nondot.org>

[APInt] Make insertBits and concat work with zero width APInts.

These should both clearly work with our current model for zero width
integers, but don't until now!

Differential Revision: https://re

[APInt] Make insertBits and concat work with zero width APInts.

These should both clearly work with our current model for zero width
integers, but don't until now!

Differential Revision: https://reviews.llvm.org/D111113

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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3
# 8b4afc5a 10-Sep-2021 Chris Lattner <clattner@nondot.org>

[APInt] Add a concat method, use LLVM_UNLIKELY to help optimizer.

Three unrelated changes:

1) Add a concat method as a convenience to help write bitvector
use cases in a nicer way.
2) Use LLVM_U

[APInt] Add a concat method, use LLVM_UNLIKELY to help optimizer.

Three unrelated changes:

1) Add a concat method as a convenience to help write bitvector
use cases in a nicer way.
2) Use LLVM_UNLIKELY as suggested by @xbolva00 in a previous patch.
3) Fix casing of some "slow" methods to follow naming standards.

Differential Revision: https://reviews.llvm.org/D109620

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# 9db20822 13-Sep-2021 Simon Pilgrim <llvm-dev@redking.me.uk>

[APInt] Add APIntOps::ScaleBitMask helper

APInt is used to describe a bit mask in a variety of value tracking and demanded bits/elts functions.

When traversing through dst/src operands, we have a n

[APInt] Add APIntOps::ScaleBitMask helper

APInt is used to describe a bit mask in a variety of value tracking and demanded bits/elts functions.

When traversing through dst/src operands, we have a number of places where these masks need to widened/narrowed to translate through bitcasts, reductions etc. to a different type.

This patch add a APIntOps::ScaleBitMask common helper, adds unit test coverage, and updates a number of cases to use the the helper instead of their own implementation.

This came up on D109065 where we currently have to add yet another implementation of the same code.

Differential Revision: https://reviews.llvm.org/D109683

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# 704a3956 09-Sep-2021 Chris Lattner <clattner@nondot.org>

[APInt] Enable APInt to support zero bit integers.

Motivation: APInt not supporting zero bit values leads to
a lot of special cases in various bits of code, particularly
when using APInt as a bit ve

[APInt] Enable APInt to support zero bit integers.

Motivation: APInt not supporting zero bit values leads to
a lot of special cases in various bits of code, particularly
when using APInt as a bit vector (where you want to start with
zero bits and then concat on more. This is particularly
challenging in the CIRCT project, where the absence of zero-bit
ConstantOp forces duplication of ops and makes instcombine-like
logic far more complicated.

Approach: zero bit integers are weird. There are two reasonable
approaches: either make it illegal to do general arithmetic on
them (e.g. sign extends), or treat them as as implicitly having
a zero value. This patch takes the conservative approach, which
enables their use in bitvector applications.

Differential Revision: https://reviews.llvm.org/D109555

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# 735f4671 09-Sep-2021 Chris Lattner <clattner@nondot.org>

[APInt] Normalize naming on keep constructors / predicate methods.

This renames the primary methods for creating a zero value to `getZero`
instead of `getNullValue` and renames predicates like `isAl

[APInt] Normalize naming on keep constructors / predicate methods.

This renames the primary methods for creating a zero value to `getZero`
instead of `getNullValue` and renames predicates like `isAllOnesValue`
to simply `isAllOnes`. This achieves two things:

1) This starts standardizing predicates across the LLVM codebase,
following (in this case) ConstantInt. The word "Value" doesn't
convey anything of merit, and is missing in some of the other things.

2) Calling an integer "null" doesn't make any sense. The original sin
here is mine and I've regretted it for years. This moves us to calling
it "zero" instead, which is correct!

APInt is widely used and I don't think anyone is keen to take massive source
breakage on anything so core, at least not all in one go. As such, this
doesn't actually delete any entrypoints, it "soft deprecates" them with a
comment.

Included in this patch are changes to a bunch of the codebase, but there are
more. We should normalize SelectionDAG and other APIs as well, which would
make the API change more mechanical.

Differential Revision: https://reviews.llvm.org/D109483

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# 9e46dd96 09-Sep-2021 Chris Lattner <clattner@nondot.org>

[APInt.h] Reduce the APInt header file interface a bit. NFC

This moves one mid-size function out of line, inlines the
trivial tcAnd/tcOr/tcXor/tcComplement methods into their only
caller, and moves

[APInt.h] Reduce the APInt header file interface a bit. NFC

This moves one mid-size function out of line, inlines the
trivial tcAnd/tcOr/tcXor/tcComplement methods into their only
caller, and moves the magic/umagic functions into SelectionDAG
since they are implementation details of its algorithm. This
also removes the unit tests for magic, but these are already
tested in the divide lowering logic for various targets.

This also upgrades some C style comments to C++.

Differential Revision: https://reviews.llvm.org/D109476

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Revision tags: llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2
# 61cdaf66 11-Jun-2021 Simon Pilgrim <llvm-dev@redking.me.uk>

[ADT] Remove APInt/APSInt toString() std::string variants

<string> is currently the highest impact header in a clang+llvm build:

https://commondatastorage.googleapis.com/chromium-browser-clang/llvm

[ADT] Remove APInt/APSInt toString() std::string variants

<string> is currently the highest impact header in a clang+llvm build:

https://commondatastorage.googleapis.com/chromium-browser-clang/llvm-include-analysis.html

One of the most common places this is being included is the APInt.h header, which needs it for an old toString() implementation that returns std::string - an inefficient method compared to the SmallString versions that it actually wraps.

This patch replaces these APInt/APSInt methods with a pair of llvm::toString() helpers inside StringExtras.h, adjusts users accordingly and removes the <string> from APInt.h - I was hoping that more of these users could be converted to use the SmallString methods, but it appears that most end up creating a std::string anyhow. I avoided trying to use the raw_ostream << operators as well as I didn't want to lose having the integer radix explicit in the code.

Differential Revision: https://reviews.llvm.org/D103888

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Revision tags: llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1, llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1
# d3a0f9b9 23-Nov-2020 Kerry McLaughlin <kerry.mclaughlin@arm.com>

[APInt] Add the truncOrSelf resizing operator to APInt

Truncates the APInt if the bit width is greater than the width specified,
otherwise do nothing

Reviewed By: RKSimon

Differential Revision: ht

[APInt] Add the truncOrSelf resizing operator to APInt

Truncates the APInt if the bit width is greater than the width specified,
otherwise do nothing

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D91445

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