[InstCombine] Extract bitcast -> gep transform

Move this into a separate function, to make sure that early
returns do not accidentally skip other transforms. There is
already one isSized() check tha

[InstCombine] Extract bitcast -> gep transform

Move this into a separate function, to make sure that early
returns do not accidentally skip other transforms. There is
already one isSized() check that could run into this issue,
thus this change is not strictly NFC.

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[InstCombine] Remove unnecessary addres space check (NFC)

It's not possible to bitcast between different address spaces,
and this is ensured by the IR verifier. As such, this bitcast to
addrspacecas

[InstCombine] Remove unnecessary addres space check (NFC)

It's not possible to bitcast between different address spaces,
and this is ensured by the IR verifier. As such, this bitcast to
addrspacecast canonicalization can never be hit.

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[InstCombine] Use poison constant to represent the result of unreachable instrs

This patch updates InstCombine to use poison constant to represent the resulting value of (either semantically or synt

[InstCombine] Use poison constant to represent the result of unreachable instrs

This patch updates InstCombine to use poison constant to represent the resulting value of (either semantically or syntactically) unreachable instrs, or a don't-care value of an unreachable store instruction.

This allows more aggressive folding of unused results, as shown in llvm/test/Transforms/InstCombine/getelementptr.ll .

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D104602

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[InstCombine] Don't transform code if DoTransform is false

In patch https://reviews.llvm.org/D72396, it doesn't check DoTransform before transforming the code, and generates wrong result for the att

[InstCombine] Don't transform code if DoTransform is false

In patch https://reviews.llvm.org/D72396, it doesn't check DoTransform before transforming the code, and generates wrong result for the attached test case.

Differential Revision: https://reviews.llvm.org/D104567

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[InstCombine] convert lshr to ashr to eliminate cast op

This is similar to b865eead7657 ( D103617 ) and fixes:
https://llvm.org/PR50575

41b71f718b94c6f12b did this and more (noted with TODO
comment

[InstCombine] convert lshr to ashr to eliminate cast op

This is similar to b865eead7657 ( D103617 ) and fixes:
https://llvm.org/PR50575

41b71f718b94c6f12b did this and more (noted with TODO
comments in the tests), but it didn't handle the case
where the destination is narrower than the source, so
it got reverted.

This is a simple match-and-replace. If there's evidence
that the TODO cases are useful, we can revisit/extend.

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[InstCombine] eliminate sext and/or trunc if value has enough signbits

If we have enough signbits in a source value, we can skip an
intermediate cast for a trunc+sext pair:
https://alive2.llvm.org/c

[InstCombine] eliminate sext and/or trunc if value has enough signbits

If we have enough signbits in a source value, we can skip an
intermediate cast for a trunc+sext pair:
https://alive2.llvm.org/ce/z/A_mQt-

This is the original problem shown in:
https://llvm.org/PR49543

There's a test that shows we transformed what used to be
a pair of shifts, so that suggests we could add another
ComputeNumSignBits fold starting from a shift.

There does not appear to be any change in compile-time
from the extra analysis:
https://llvm-compile-time-tracker.com/compare.php?from=3d2c9069dcafd0cbb641841aa3dd6e851fb7d760&to=b9513cdf2419704c7bb0c3a02a9ca06aae13d902&stat=instructions

Differential Revision: https://reviews.llvm.org/D103617

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[InsCombine] Fix a few remaining vec transforms to use poison instead of undef

This is a patch that replaces shufflevector and insertelement's placeholder value with poison.

Underlying motivation i

[InsCombine] Fix a few remaining vec transforms to use poison instead of undef

This is a patch that replaces shufflevector and insertelement's placeholder value with poison.

Underlying motivation is to fix the semantics of shufflevector with undef mask to return poison instead
(D93818)
The consensus has been made in the late 2020 via mailing list as well as the thread in https://bugs.llvm.org/show_bug.cgi?id=44185 .

This patch is a simple syntactic change to the existing code, hence directly pushed as a commit.

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[InstCombine] fold zext of masked bit set/clear

This does not solve PR17101, but it is one of the
underlying diffs noted here:
https://bugs.llvm.org/show_bug.cgi?id=17101#c8

We could ease the one-u

[InstCombine] fold zext of masked bit set/clear

This does not solve PR17101, but it is one of the
underlying diffs noted here:
https://bugs.llvm.org/show_bug.cgi?id=17101#c8

We could ease the one-use checks for the 'clear'
(no 'not' op) half of the transform, but I do not
know if that asymmetry would make things better
or worse.

Proofs:
https://rise4fun.com/Alive/uVB

Name: masked bit set
%sh1 = shl i32 1, %y
%and = and i32 %sh1, %x
%cmp = icmp ne i32 %and, 0
%r = zext i1 %cmp to i32
=>
%s = lshr i32 %x, %y
%r = and i32 %s, 1

Name: masked bit clear
%sh1 = shl i32 1, %y
%and = and i32 %sh1, %x
%cmp = icmp eq i32 %and, 0
%r = zext i1 %cmp to i32
=>
%xn = xor i32 %x, -1
%s = lshr i32 %xn, %y
%r = and i32 %s, 1

Note: this is a re-post of a patch that I committed at:
rGa041c4ec6f7a

The commit was reverted because it exposed another bug:
rGb212eb7159b40

But that has since been corrected with:
rG8a156d1c2795189 ( D101191 )

Differential Revision: https://reviews.llvm.org/D72396

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[InstCombine] reduce code duplication; NFC

[InstCombine] canonicalize cast before unary shuffle

We could go either direction on this transform. VectorCombine already goes this
way for bitcasts (and handles more complicated cases using the co

[InstCombine] canonicalize cast before unary shuffle

We could go either direction on this transform. VectorCombine already goes this
way for bitcasts (and handles more complicated cases using the cost model), so
let's try cast-first.

Deferring completely to VectorCombine is another possibility. But the backend
should be able to invert this easily when the vectors have the same shape, so
it doesn't seem like a transform that we need to avoid.

The motivating example from https://llvm.org/PR49081 has an int-to-float
sandwiched between 2 shuffles, and the backend currently does not reduce that,
so on x86, we get something like:

pshufd $249, %xmm0, %xmm0]
cvtdq2ps %xmm0, %xmm0
shufps $144, %xmm0, %xmm0

...instead of just a single conversion instruction.

Differential Revision: https://reviews.llvm.org/D103038

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[InstCombine] restrict funnel shift match to avoid miscompile

As noted in the post-commit discussion for:
https://reviews.llvm.org/rGabd7529625a73f405e40a63dcc446c41d51a219e

...that change exposed

[InstCombine] restrict funnel shift match to avoid miscompile

As noted in the post-commit discussion for:
https://reviews.llvm.org/rGabd7529625a73f405e40a63dcc446c41d51a219e

...that change exposed a logic hole that allows a miscompile
if the shift amount could exceed the narrow width:
https://alive2.llvm.org/ce/z/-i_CiM
https://alive2.llvm.org/ce/z/NaYz28

The restriction isn't necessary for a rotate (same operand for
both shifts), so we should adjust the matching for the shift
value as a follow-up enhancement:
https://alive2.llvm.org/ce/z/ahuuQb

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[InstCombine] relax masking requirement for truncated funnel/rotate match

I was investigating a seemingly unrelated improvement in demanded
bits for shift-left, but that caused regressions on these

[InstCombine] relax masking requirement for truncated funnel/rotate match

I was investigating a seemingly unrelated improvement in demanded
bits for shift-left, but that caused regressions on these tests
because we were able to look through/eliminate the mask.

https://alive2.llvm.org/ce/z/Ztdr22

define i8 @src(i32 %x, i32 %y, i32 %shift) {
%and = and i32 %shift, 3
%conv = and i32 %x, 255
%shr = lshr i32 %conv, %and
%sub = sub i32 8, %and
%shl = shl i32 %y, %sub
%or = or i32 %shr, %shl
%conv2 = trunc i32 %or to i8
ret i8 %conv2
}

define i8 @tgt(i32 %x, i32 %y, i32 %shift) {
%x8 = trunc i32 %x to i8
%y8 = trunc i32 %y to i8
%shift8 = trunc i32 %shift to i8
%and = and i8 %shift8, 3
%conv2 = call i8 @llvm.fshr.i8(i8 %y8, i8 %x8, i8 %and)
ret i8 %conv2
}

declare i8 @llvm.fshr.i8(i8,i8,i8)

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Revert "[InstCombine] `sext(trunc(x)) --> sext(x)` iff trunc is NSW (PR49543)"

I forgot about the case where we sign-extend to width smaller than the original.

This reverts commit 1e6ca23ab8e350c7b

Revert "[InstCombine] `sext(trunc(x)) --> sext(x)` iff trunc is NSW (PR49543)"

I forgot about the case where we sign-extend to width smaller than the original.

This reverts commit 1e6ca23ab8e350c7bab5d7f93e4d3dee18d180cc.

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Revert "[InstCombine] "Bypass" NUW trunc of lshr if we are going to sext the result (PR49543)"

I forgot about the case where we sign-extend to width smaller than the original.

This reverts commit 4

Revert "[InstCombine] "Bypass" NUW trunc of lshr if we are going to sext the result (PR49543)"

I forgot about the case where we sign-extend to width smaller than the original.

This reverts commit 41b71f718b94c6f12bbaa670e97cabb070308ed2.

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[InstCombine] "Bypass" NUW trunc of lshr if we are going to sext the result (PR49543)

This is a more convoluted form of the same pattern "sext of NSW trunc",
but in this case the operand of trunc wa

[InstCombine] "Bypass" NUW trunc of lshr if we are going to sext the result (PR49543)

This is a more convoluted form of the same pattern "sext of NSW trunc",
but in this case the operand of trunc was a right-shift,
and the truncation chops off just the zero bits that were shifted-in.

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[InstCombine] `sext(trunc(x)) --> sext(x)` iff trunc is NSW (PR49543)

If we can tell that trunc only chops off sign bits, and not all of them,
then we can simply sign-extend the trunc's source.

[X86][AMX] Verify illegal types or instructions for x86_amx.

This patch is related to https://reviews.llvm.org/D100032 which define
some illegal types or operations for x86_amx. There are no argumen

[X86][AMX] Verify illegal types or instructions for x86_amx.

This patch is related to https://reviews.llvm.org/D100032 which define
some illegal types or operations for x86_amx. There are no arguments,
arrays, pointers, vectors or constants of x86_amx.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D100472

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Update InstCombine to use undef matcher instead

This is a patch to use m_Undef() matcher instead of isa<UndefValue>().

As suggested in D100122, this update is separately committed.

Replace calls to IntrinsicInst::Create with CallInst::Create [nfc]

There is no IntrinsicInst::Create. These are binding to the method in the super type. Be explicitly about which method is being c

Replace calls to IntrinsicInst::Create with CallInst::Create [nfc]

There is no IntrinsicInst::Create. These are binding to the method in the super type. Be explicitly about which method is being called.

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[llvm-opt] Bug fix within combining FP vectors

A bug was found within InstCombineCasts where a function call
is only implemented to work with FixedVectors. This caused a
crash when a ScalableVector

[llvm-opt] Bug fix within combining FP vectors

A bug was found within InstCombineCasts where a function call
is only implemented to work with FixedVectors. This caused a
crash when a ScalableVector was passed to this function.
This commit introduces a regression test which recreates the
failure and a bug fix.

Differential Revision: https://reviews.llvm.org/D98351

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[NFC][IR] Type: add getWithNewType() method

Sometimes you want to get a type with same vector element count
as the current type, but different element type,
but there's no QOL wrapper to do that. Ad

[NFC][IR] Type: add getWithNewType() method

Sometimes you want to get a type with same vector element count
as the current type, but different element type,
but there's no QOL wrapper to do that. Add one.

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Update basic deref API to account for possiblity of free [NFC]

This patch is plumbing to support work towards the goal outlined in the recent llvm-dev post "[llvm-dev] RFC: Decomposing deref(N) into

Update basic deref API to account for possiblity of free [NFC]

This patch is plumbing to support work towards the goal outlined in the recent llvm-dev post "[llvm-dev] RFC: Decomposing deref(N) into deref(N) + nofree".

The point of this change is purely to simplify iteration on other pieces on way to making the switch. Rebuilding with a change to Value.h is slow and painful, so I want to get the API change landed. Once that's done, I plan to more closely audit each caller, add the inference rules in their own patch, then post a patch with the langref changes and test diffs. The value of the command line flag is that we can exercise the inference logic in standalone patches without needing the whole switch ready to go just yet.

Differential Revision: https://reviews.llvm.org/D98908

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[X86][AMX] Prevent transforming load pointer from <256 x i32>* to x86_amx*.

The load/store instruction will be transformed to amx intrinsics
in the pass of AMX type lowering. Prohibiting the pointer

[X86][AMX] Prevent transforming load pointer from <256 x i32>* to x86_amx*.

The load/store instruction will be transformed to amx intrinsics
in the pass of AMX type lowering. Prohibiting the pointer cast
make that pass happy.

Differential Revision: https://reviews.llvm.org/D98247

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[InstCombine] avoid creating an extra instruction in zext fold and possible inf-loop

The structure of this fold is suspect vs. most of instcombine
because it creates instructions and tries to delete

[InstCombine] avoid creating an extra instruction in zext fold and possible inf-loop

The structure of this fold is suspect vs. most of instcombine
because it creates instructions and tries to delete them
immediately after.

If we don't have the operand types for the icmps, then we are
not behaving as assumed. And as shown in PR49475, we can inf-loop.

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[STLExtras] Use return type from operator* of the wrapped iter.

Currently make_early_inc_range cannot be used with iterators with
operator* implementations that do not return a reference.

Most nota

[STLExtras] Use return type from operator* of the wrapped iter.

Currently make_early_inc_range cannot be used with iterators with
operator* implementations that do not return a reference.

Most notably in the LLVM codebase, this means the User iterator ranges
cannot be used with make_early_inc_range, which slightly simplifies
iterating over ranges while elements are removed.

Instead of directly using BaseT::reference as return type of operator*,
this patch uses decltype to get the actual return type of the operator*
implementation in WrappedIteratorT.

This patch also updates a few places to use make use of
make_early_inc_range.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D93992

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