Revert "[InstCombine] Add support for max(a,b) + min(a,b) => a + b."

Revert commit due to failure on buildbot:
error: 'match_combine_or' may not intend to support class template argument deduction

Revert "[InstCombine] Add support for max(a,b) + min(a,b) => a + b."

Revert commit due to failure on buildbot:
error: 'match_combine_or' may not intend to support class template argument deduction

This reverts commit b86a06ef284f2637bef89bf5bb20157a8b195568.

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[InstCombine] Add support for max(a,b) + min(a,b) => a + b.

The same optimization for
max(a,b) * min(a,b) => a * b
is added.

Correctness check:
uadd: https://alive2.llvm.org/ce/z/2rXDek
sadd: htt

[InstCombine] Add support for max(a,b) + min(a,b) => a + b.

The same optimization for
max(a,b) * min(a,b) => a * b
is added.

Correctness check:
uadd: https://alive2.llvm.org/ce/z/2rXDek
sadd: https://alive2.llvm.org/ce/z/zNu_er
uadd + nuw/nsw: https://alive2.llvm.org/ce/z/EaiNjB
sadd + nuw/nsw: https://alive2.llvm.org/ce/z/w_2Nrs

umul: https://alive2.llvm.org/ce/z/dgXRLr
smul: https://alive2.llvm.org/ce/z/hBjGzz
umul + nuw/nsw: https://alive2.llvm.org/ce/z/EaiNjB
smul + nuw/nsw: https://alive2.llvm.org/ce/z/87MNeS

Reviewed By: goldstein.w.n
Differential Revision: https://reviews.llvm.org/D147296

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[InstCombine] Reduce absolute diff from min+max+sub

This patch implements fold: max(a,b) nsw/nuw - min(a,b) --> abs(a nsw - b)

Alive2: https://alive2.llvm.org/ce/z/4yLp7D
Fixes: https://github.com/

[InstCombine] Reduce absolute diff from min+max+sub

This patch implements fold: max(a,b) nsw/nuw - min(a,b) --> abs(a nsw - b)

Alive2: https://alive2.llvm.org/ce/z/4yLp7D
Fixes: https://github.com/llvm/llvm-project/issues/61228

Signed-off-by: Jun Zhang <jun@junz.org>

Differential Revision: https://reviews.llvm.org/D145540

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[InstCombine] reassociate subtract-from-constant to add-constant

(C - X) + Y --> (Y - X) + C

Moving the constant operand to an 'add' gives more
flexibility to subsequent reassociation patterns,
and

[InstCombine] reassociate subtract-from-constant to add-constant

(C - X) + Y --> (Y - X) + C

Moving the constant operand to an 'add' gives more
flexibility to subsequent reassociation patterns,
and it may be better for codegen on targets that
don't have subtract-from-immediate instructions.

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Use APInt::count{l,r}_{zero,one} (NFC)

[InstCombine][LV] Fold (add (zext (add X, -1)), 1) -> (zext X) if X is non-zero.

This artifact can appear from the vectorizer. (add X, -1) is the
backedge taken count. It gets zero extended and then

[InstCombine][LV] Fold (add (zext (add X, -1)), 1) -> (zext X) if X is non-zero.

This artifact can appear from the vectorizer. (add X, -1) is the
backedge taken count. It gets zero extended and then 1 is added to
it to get the trip count.

There is usually a dominating branch that rules out X being zero.

Alive: https://alive2.llvm.org/ce/z/NsRDwX

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[InstCombine] restrict no-wrap propagation for i1/i2 to avoid miscompiles

This transform was added with 68c197f07eeae71b9b7,
and the post-commit review noted the potential
for miscompiles at narrow

[InstCombine] restrict no-wrap propagation for i1/i2 to avoid miscompiles

This transform was added with 68c197f07eeae71b9b7,
and the post-commit review noted the potential
for miscompiles at narrow bitwidths.

I'm not sure how to expose the i1 nuw bug because we
already simplify that, but other cases show that
there are missing transforms to add in follow-up
patches.

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[InstCombine] reduce code duplication in visitSub(); NFC

[InstCombine] factor difference-of-squares to reduce multiplication

(X * X) - (Y * Y) --> (X + Y) * (X - Y)
https://alive2.llvm.org/ce/z/BAuRCf

The no-wrap propagation could be relaxed in some case

[InstCombine] factor difference-of-squares to reduce multiplication

(X * X) - (Y * Y) --> (X + Y) * (X - Y)
https://alive2.llvm.org/ce/z/BAuRCf

The no-wrap propagation could be relaxed in some cases,
but there does not seem to be an obvious rule for that.

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[InstCombine] canonicalize a signum (spaceship) that ends in add

(A s>> (BW - 1)) + (zext (A s> 0)) --> (A s>> (BW - 1)) | (zext (A != 0))

https://alive2.llvm.org/ce/z/V-nM8N

This is not the form

[InstCombine] canonicalize a signum (spaceship) that ends in add

(A s>> (BW - 1)) + (zext (A s> 0)) --> (A s>> (BW - 1)) | (zext (A != 0))

https://alive2.llvm.org/ce/z/V-nM8N

This is not the form that we currently match as m_Signum(),
but I'm not sure if one is better than the other, so there's
a follow-up patch needed either way.

For this patch, it should be better for analysis to use a
not-null test and bitwise logic rather than >0 with add.
Codegen doesn't seem significantly different on any targets
that I looked at.

Also note that none of these variants is shown in issue #60012 -
those generally include at least one 'select', so that's likely
where these patterns will end up.

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[InstCombine] Combine ZExt (B - A) + ZExt(A) to ZExt(B)

Combine ZExt (B - A) + ZExt(A) to ZExt(B)
https://alive2.llvm.org/ce/z/ESUwPi

Reviewed By: spatel

Differential Revision: https://reviews.llv

[InstCombine] Combine ZExt (B - A) + ZExt(A) to ZExt(B)

Combine ZExt (B - A) + ZExt(A) to ZExt(B)
https://alive2.llvm.org/ce/z/ESUwPi

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D139930

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InstCombine: Fold fneg (copysign x, y) -> copysign x, (fneg y)

[InstCombine] fold flooring sdiv by power-of-2 to ashr

It's a bigger match than usual, but I have not found any
sub-patterns that reduce:
(X / DivC) + sext ((X & (SMin | (DivC - 1)) >u SMin) --> X >

[InstCombine] fold flooring sdiv by power-of-2 to ashr

It's a bigger match than usual, but I have not found any
sub-patterns that reduce:
(X / DivC) + sext ((X & (SMin | (DivC - 1)) >u SMin) --> X >>s log2(DivC)

https://alive2.llvm.org/ce/z/MJzlhl

Fixes issue #55741

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[InstCombine] allow more fast-math-flags to propagate in fneg-of-select fold

We were conservatively intersecting flags, but we can take the union here
because forbidden special values (nsz/nnan/ninf

[InstCombine] allow more fast-math-flags to propagate in fneg-of-select fold

We were conservatively intersecting flags, but we can take the union here
because forbidden special values (nsz/nnan/ninf) are not altered by fneg.
So if they were guaranteed not present on the select or fneg, then they
are guaranteed not present on the new select. Alive2 appears to agree on
the test diffs (reduced to not include irrelevant flags like reassoc):
https://alive2.llvm.org/ce/z/ViqqrO

This prevents a potential regression if we tighten up the FMF behavior
for fabs with NAN as suggested in issue #59279.

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[InstCombine] fold `sub + and` pattern with specific const value

`C1 - ((C3 - X) & C2) --> (X & C2) + (C1 - (C2 & C3))`
when:
(C3 - ((C2 & C3) - 1)) is pow2 &&
((C2 + C3) & ((C2 & C3) - 1))

[InstCombine] fold `sub + and` pattern with specific const value

`C1 - ((C3 - X) & C2) --> (X & C2) + (C1 - (C2 & C3))`
when:
(C3 - ((C2 & C3) - 1)) is pow2 &&
((C2 + C3) & ((C2 & C3) - 1)) == ((C2 & C3) - 1) &&
C2 is negative pow2 || (C3 - X) is nuw

https://alive2.llvm.org/ce/z/HXQJV-

Fix: #58523

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D136582

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[InstCombine] refactor the SimplifyUsingDistributiveLaws NFC

Precommit for D136015
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D137019

[InstCombine] Fold series of instructions into mull for more types

Relax the constraint of wide/vectors types.
Address the comment https://reviews.llvm.org/D136015?id=469189#inline-1314520

Reviewed

[InstCombine] Fold series of instructions into mull for more types

Relax the constraint of wide/vectors types.
Address the comment https://reviews.llvm.org/D136015?id=469189#inline-1314520

Reviewed By: spatel, chfast
Differential Revision: https://reviews.llvm.org/D136661

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[InstCombine] Fold series of instructions into mull

The following sequence should be folded into in0 * in1
In0Lo = in0 & 0xffffffff; In0Hi = in0 >> 32;
In1Lo = in1 & 0xffffffff; In1Hi =

[InstCombine] Fold series of instructions into mull

The following sequence should be folded into in0 * in1
In0Lo = in0 & 0xffffffff; In0Hi = in0 >> 32;
In1Lo = in1 & 0xffffffff; In1Hi = in1 >> 32;
m01 = In1Hi * In0Lo; m10 = In1Lo * In0Hi; m00 = In1Lo * In0Lo;
addc = m01 + m10;
ResLo = m00 + (addc >> 32);

Reviewed By: spatel, RKSimon
Differential Revision: https://reviews.llvm.org/D136015

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[InstCombine] try to fold mul by neg-power-of-2 to shl

`(A * -2**C) + B --> B - (A << C)`

https://alive2.llvm.org/ce/z/A6BWkf

This inverts what Negator was doing before:
D134310 / 0f32a5dea0e9

An

[InstCombine] try to fold mul by neg-power-of-2 to shl

`(A * -2**C) + B --> B - (A << C)`

https://alive2.llvm.org/ce/z/A6BWkf

This inverts what Negator was doing before:
D134310 / 0f32a5dea0e9

Analysis and codegen are generally better without multiply,
so we should favor this form even if we trade add for sub
(because those are generally equivalent cost operations).

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[InstCombine] Fix bug when folding x + (x | -x) to x & (x - 1)

Addresses concern: https://reviews.llvm.org/rG09cdddea0c4d284c2c22f5dfade40a60850c5ea7

There was a copy/paste mistake in the code. Upd

[InstCombine] Fix bug when folding x + (x | -x) to x & (x - 1)

Addresses concern: https://reviews.llvm.org/rG09cdddea0c4d284c2c22f5dfade40a60850c5ea7

There was a copy/paste mistake in the code. Updated code and test ref.

Differential Revision: https://reviews.llvm.org/D134135

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[InstCombine] Fold x + (x | -x) to x & (x - 1)

Fixes #57531

This transformation may be particularly useful on x86-64,
because x & (x - 1) can be performed by a single blsr instruction.

Differentia

[InstCombine] Fold x + (x | -x) to x & (x - 1)

Fixes #57531

This transformation may be particularly useful on x86-64,
because x & (x - 1) can be performed by a single blsr instruction.

Differential Revision: https://reviews.llvm.org/D133362

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[llvm] Use std::size instead of llvm::array_lengthof

LLVM contains a helpful function for getting the size of a C-style
array: `llvm::array_lengthof`. This is useful prior to C++17, but not as
helpf

[llvm] Use std::size instead of llvm::array_lengthof

LLVM contains a helpful function for getting the size of a C-style
array: `llvm::array_lengthof`. This is useful prior to C++17, but not as
helpful for C++17 or later: `std::size` already has support for C-style
arrays.

Change call sites to use `std::size` instead.

Differential Revision: https://reviews.llvm.org/D133429

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[InstCombine] remove dead code for add (select cond, (sub), 0); NFC

This pattern is handled more generally in SimplifySelectsFeedingBinaryOp().
Tests to confirm that added to the add.ll test file in

[InstCombine] remove dead code for add (select cond, (sub), 0); NFC

This pattern is handled more generally in SimplifySelectsFeedingBinaryOp().
Tests to confirm that added to the add.ll test file in the previous commit.

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[InstCombine] fold not-shift of signbit to icmp+zext

https://alive2.llvm.org/ce/z/j_8Wz9

The arithmetic shift was converted to logical shift with:
246078604c871d43

That does not seem to uncover an

[InstCombine] fold not-shift of signbit to icmp+zext

https://alive2.llvm.org/ce/z/j_8Wz9

The arithmetic shift was converted to logical shift with:
246078604c871d43

That does not seem to uncover any other missing/conflicting folds,
so convert directly to signbit test + cast.

We still need to fold the pattern with logical shift to test + cast.

This allows reducing patterns where the output type is not
the same as the input value:
https://alive2.llvm.org/ce/z/nydwFV

Fixes #57394

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[InstCombine] fold inc-of-signbit-splat to not+lshr

(iN X s>> (N - 1)) + 1 --> (~X) u>> (N - 1)

https://alive2.llvm.org/ce/z/wzS474