#
7f7bbb9b |
| 17-Jan-2024 |
Anatoly Trosinenko <atrosinenko@accesssoftek.com> |
[AArch64] Use parseArchExtension function. NFC (#78158)
|
#
586ecdf2 |
| 12-Dec-2023 |
Kazu Hirata <kazu@google.com> |
[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)
This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::
[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)
This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::{starts,ends}_with in C++20.
I'm planning to deprecate and eventually remove
StringRef::{starts,ends}with.
show more ...
|
Revision tags: llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2 |
|
#
73779bb2 |
| 22-Sep-2023 |
Balint Cristian <cristian.balint@gmail.com> |
[clang] Enable descriptions for --print-supported-extensions (#66715)
Enables summary descriptions along with the names of the feature.
Descriptions here are simply looked up via the available llvm
[clang] Enable descriptions for --print-supported-extensions (#66715)
Enables summary descriptions along with the names of the feature.
Descriptions here are simply looked up via the available llvm tablegen
data.
show more ...
|
Revision tags: llvmorg-17.0.1, llvmorg-17.0.0 |
|
#
491a1cd0 |
| 12-Sep-2023 |
hassnaaHamdi <hassnaa.hamdi@arm.com> |
[AArch64]: Refactor target parser to use Bitset. (#65423)
Use Bitset instead of BitMasking for the Architecture Extensions,
as the number of extensions will exceed the bitmask bits eventually.
|
#
90db4193 |
| 11-Sep-2023 |
David Spickett <david.spickett@linaro.org> |
[clang][AArch64] Add --print-supported-extensions support (#65466)
This follows the RISC-V work done in
4b40ced4e5ba10b841516b3970e7699ba8ded572.
This uses AArch64's target parser instead. We ju
[clang][AArch64] Add --print-supported-extensions support (#65466)
This follows the RISC-V work done in
4b40ced4e5ba10b841516b3970e7699ba8ded572.
This uses AArch64's target parser instead. We just list the names,
without the "+" on them, which matches RISC-V's format.
```
$ ./bin/clang -target aarch64-linux-gnu --print-supported-extensions
clang version 18.0.0 (https://github.com/llvm/llvm-project.git 154da8aec20719c82235a6957aa6e461f5a5e030)
Target: aarch64-unknown-linux-gnu
Thread model: posix
InstalledDir: <...>
All available -march extensions for AArch64
aes
b16b16
bf16
brbe
crc
crypto
cssc
<...>
```
Since our extensions don't have versions in the same way there's just
one column with the name in.
Any extension without a feature name (including the special "none") is
not listed as those cannot be passed to -march, they're just for the
backend. For example the MTE extension can be added with "+memtag" but
MTE2 and MTE3 do not have feature names so they cannot be added to
-march.
This does not attempt to tackle the fact that clang allows invalid
combinations of AArch64 extensions, it simply lists the possible
options. It's still up to the user to ask for something sensible.
Equally, this has no context of what CPU is being selected. Neither does
the RISC-V option, the user has to be aware of that.
I've added a target parser test, and a high level clang test that checks
RISC-V and AArch64 work and that Intel, that doesn't support this, shows
the correct error.
show more ...
|
Revision tags: llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init |
|
#
143e131a |
| 11-Jun-2023 |
Kazu Hirata <kazu@google.com> |
Do not unnecessarily include StringSwitch.h
|
Revision tags: llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4 |
|
#
c417b7a6 |
| 27-Feb-2023 |
Pavel Kosov <kpdev42@gmail.com> |
[OHOS] Add support for OpenHarmony
Add support for OpenHarmony OS
General OpenHarmony OS discussion on discourse thread "[RFC] Add support for OpenHarmony OS" https://discourse.llvm.org/t/rfc-add-s
[OHOS] Add support for OpenHarmony
Add support for OpenHarmony OS
General OpenHarmony OS discussion on discourse thread "[RFC] Add support for OpenHarmony OS" https://discourse.llvm.org/t/rfc-add-support-for-openharmony-os/66656
Reviewed By: DavidSpickett
Differential Revision: https://reviews.llvm.org/D138202
show more ...
|
Revision tags: llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1 |
|
#
852bb68d |
| 25-Jan-2023 |
Lucas Prates <lucas.prates@arm.com> |
[NFC][AArch64] Get extension strings directly from ArchInfo in target parser
Reviewed By: tmatheson
Differential Revision: https://reviews.llvm.org/D142541
|
Revision tags: llvmorg-17-init |
|
#
0753cf2c |
| 24-Jan-2023 |
Lucas Prates <lucas.prates@arm.com> |
[NFC][AArch64] Get default features directly from ArchInfo and CpuInfo objects
This updates the AArch64's Target Parser and its uses to capture information about default features directly from ArchI
[NFC][AArch64] Get default features directly from ArchInfo and CpuInfo objects
This updates the AArch64's Target Parser and its uses to capture information about default features directly from ArchInfo and CpuInfo objects, instead of relying on an API function to access them indirectly.
Reviewed By: tmatheson
Differential Revision: https://reviews.llvm.org/D142540
show more ...
|
#
9ea00fc7 |
| 23-Jan-2023 |
Lucas Prates <lucas.prates@arm.com> |
[NFC][AArch64] Use optional returns in target parser instead of 'invalid' objects
This updates the parsing methods in AArch64's Target Parser to make use of optional returns instead of "invalid" enu
[NFC][AArch64] Use optional returns in target parser instead of 'invalid' objects
This updates the parsing methods in AArch64's Target Parser to make use of optional returns instead of "invalid" enum values, making the API's behaviour clearer.
Reviewed By: lenary, tmatheson
Differential Revision: https://reviews.llvm.org/D142539
show more ...
|
Revision tags: llvmorg-15.0.7 |
|
#
f4225d32 |
| 09-Dec-2022 |
Tomas Matheson <tomas.matheson@arm.com> |
[AArch64] Reland "Improve TargetParser API"
Reworked after several other major changes to the TargetParser since this was reverted. Combined with several other changes.
Inline calls for the followi
[AArch64] Reland "Improve TargetParser API"
Reworked after several other major changes to the TargetParser since this was reverted. Combined with several other changes.
Inline calls for the following macros and delete AArch64TargetParser.def: AARCH64_ARCH, AARCH64_CPU_NAME, AARCH64_CPU_ALIAS, AARCH64_ARCH_EXT_NAME
Squashed changes from D139278 and D139102.
Differential Revision: https://reviews.llvm.org/D138792
show more ...
|
#
fe5cf480 |
| 21-Dec-2022 |
Pavel Iliin <Pavel.Iliin@arm.com> |
Reland "[AArch64] FMV support and necessary target features dependencies."
This relands commits e43924a75145d2f9e722f74b673145c3e62bfd07, a43f36142c501e2d3f4797ef938db4e0c5e0eeec, bf94eac6a3f7c5cd89
Reland "[AArch64] FMV support and necessary target features dependencies."
This relands commits e43924a75145d2f9e722f74b673145c3e62bfd07, a43f36142c501e2d3f4797ef938db4e0c5e0eeec, bf94eac6a3f7c5cd8941956d44c15524fa3751bd with MSan buildbot https://lab.llvm.org/buildbot/#/builders/5/builds/30139 use-of-uninitialized-value errors fixed.
Differential Revision: https://reviews.llvm.org/D127812
show more ...
|
#
744486ec |
| 21-Dec-2022 |
Mitch Phillips <31459023+hctim@users.noreply.github.com> |
Revert "[AArch64] FMV support and necessary target features dependencies."
This reverts commit e43924a75145d2f9e722f74b673145c3e62bfd07.
Reason: Patch broke the MSan buildbots. More information is
Revert "[AArch64] FMV support and necessary target features dependencies."
This reverts commit e43924a75145d2f9e722f74b673145c3e62bfd07.
Reason: Patch broke the MSan buildbots. More information is available on the original phabricator review: https://reviews.llvm.org/D127812
show more ...
|
Revision tags: llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
|
#
e43924a7 |
| 15-Dec-2021 |
Pavel Iliin <Pavel.Iliin@arm.com> |
[AArch64] FMV support and necessary target features dependencies.
This is Function Multi Versioning (FMV) implementation for AArch64 target in accordance with Beta Arm C Language Extensions specific
[AArch64] FMV support and necessary target features dependencies.
This is Function Multi Versioning (FMV) implementation for AArch64 target in accordance with Beta Arm C Language Extensions specification https://github.com/ARM-software/acle/blob/main/main/acle.md#function-multi-versioning It supports new "target_version" function attribute and extends existing "target_clones" one. Also missing dependencies for target features were added.
Differential Revision: https://reviews.llvm.org/D127812
show more ...
|
#
f09cf34d |
| 20-Dec-2022 |
Archibald Elliott <archibald.elliott@arm.com> |
[Support] Move TargetParsers to new component
This is a fairly large changeset, but it can be broken into a few pieces: - `llvm/Support/*TargetParser*` are all moved from the LLVM Support componen
[Support] Move TargetParsers to new component
This is a fairly large changeset, but it can be broken into a few pieces: - `llvm/Support/*TargetParser*` are all moved from the LLVM Support component into a new LLVM Component called "TargetParser". This potentially enables using tablegen to maintain this information, as is shown in https://reviews.llvm.org/D137517. This cannot currently be done, as llvm-tblgen relies on LLVM's Support component. - This also moves two files from Support which use and depend on information in the TargetParser: - `llvm/Support/Host.{h,cpp}` which contains functions for inspecting the current Host machine for info about it, primarily to support getting the host triple, but also for `-mcpu=native` support in e.g. Clang. This is fairly tightly intertwined with the information in `X86TargetParser.h`, so keeping them in the same component makes sense. - `llvm/ADT/Triple.h` and `llvm/Support/Triple.cpp`, which contains the target triple parser and representation. This is very intertwined with the Arm target parser, because the arm architecture version appears in canonical triples on arm platforms. - I moved the relevant unittests to their own directory.
And so, we end up with a single component that has all the information about the following, which to me seems like a unified component: - Triples that LLVM Knows about - Architecture names and CPUs that LLVM knows about - CPU detection logic for LLVM
Given this, I have also moved `RISCVISAInfo.h` into this component, as it seems to me to be part of that same set of functionality.
If you get link errors in your components after this patch, you likely need to add TargetParser into LLVM_LINK_COMPONENTS in CMake.
Differential Revision: https://reviews.llvm.org/D137838
show more ...
|