History log of /llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp (Results 101 – 111 of 111)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
# d70e5907 08-Dec-2015 Dan Gohman <dan433584@gmail.com>

[WebAssembly] Assert MRI.isSSA() in passes that depend on SSA form.

llvm-svn: 254995


# 4da4abd8 05-Dec-2015 Dan Gohman <dan433584@gmail.com>

[WebAssembly] Fix scheduling dependencies in register-stackified code

Add physical register defs to instructions used from stackified
instructions to prevent them from being scheduled into the middl

[WebAssembly] Fix scheduling dependencies in register-stackified code

Add physical register defs to instructions used from stackified
instructions to prevent them from being scheduled into the middle of
a stack sequence. This is a conservative measure which may be loosened
in the future.

Differential Revision: http://reviews.llvm.org/D15252

llvm-svn: 254811

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# 35bfb24c 04-Dec-2015 Dan Gohman <dan433584@gmail.com>

[WebAssembly] Initial varargs support.

Full varargs support will depend on prologue/epilogue support, but this patch
gets us started with most of the basic infrastructure.

Differential Revision: ht

[WebAssembly] Initial varargs support.

Full varargs support will depend on prologue/epilogue support, but this patch
gets us started with most of the basic infrastructure.

Differential Revision: http://reviews.llvm.org/D15231

llvm-svn: 254799

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# 391a98af 03-Dec-2015 Dan Gohman <dan433584@gmail.com>

[WebAssembly] Fix dominance check for PHIs in the StoreResult pass

When a block has no terminator instructions, getFirstTerminator() returns
end(), which can't be used in dominance checks. Check dom

[WebAssembly] Fix dominance check for PHIs in the StoreResult pass

When a block has no terminator instructions, getFirstTerminator() returns
end(), which can't be used in dominance checks. Check dominance for phi
operands separately.

Also, remove some bits from WebAssemblyRegStackify.cpp that were causing
trouble on the same testcase; they were left behind from an earlier
experiment.

Differential Revision: http://reviews.llvm.org/D15210

llvm-svn: 254662

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# 53d13997 02-Dec-2015 Dan Gohman <dan433584@gmail.com>

[WebAssembly] Fix comments to say "LIFO" instead of "FIFO" when describing a stack.

llvm-svn: 254523


Revision tags: llvmorg-3.7.1
# 7a6b9825 29-Nov-2015 Dan Gohman <dan433584@gmail.com>

[WebAssembly] Minor clang-format and selected clang-tidy cleanups. NFC.

llvm-svn: 254267


# 81719f85 25-Nov-2015 Dan Gohman <dan433584@gmail.com>

[WebAssembly] Support for register stackifying with load and store instructions.

llvm-svn: 254076


Revision tags: llvmorg-3.7.1-rc2
# 7bafa0ea 20-Nov-2015 Dan Gohman <dan433584@gmail.com>

[WebAssembly] Add asserts that the expression stack is used in stack order.

llvm-svn: 253638


# b0992daf 20-Nov-2015 Dan Gohman <dan433584@gmail.com>

[WebAssemby] Enforce FIFO ordering for instructions using stackified registers.

llvm-svn: 253634


# 4ba4816b 18-Nov-2015 Dan Gohman <dan433584@gmail.com>

[WebAssembly] Enable register coloring and register stackifying.

This also takes the push/pop syntax another step forward, introducing stack
slot numbers to make it easier to see how expressions are

[WebAssembly] Enable register coloring and register stackifying.

This also takes the push/pop syntax another step forward, introducing stack
slot numbers to make it easier to see how expressions are connected. For
example, the value pushed in $push7 is popped in $pop7.

And, this begins an experiment with making get_local and set_local implicit
when an operation directly uses or defines a register. This greatly reduces
clutter. If this experiment succeeds, it may make sense to do this for
const instructions as well.

And, this introduces more special code for ARGUMENTS; hopefully this code
will soon be obviated by proper support for live-in virtual registers.

llvm-svn: 253465

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Revision tags: llvmorg-3.7.1-rc1
# 1462faad 16-Nov-2015 Dan Gohman <dan433584@gmail.com>

[WebAssembly] Prototype passes for register coloring and register stackifying.

These passes are not yet enabled by default.

llvm-svn: 253217


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