History log of /llvm-project/llvm/lib/Target/Mips/MipsSubtarget.cpp (Results 51 – 75 of 176)
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# 39a2afc9 13-Jun-2015 Matthias Braun <matze@braunis.de>

Rename TargetSubtargetInfo::enablePostMachineScheduler() to enablePostRAScheduler()

r213101 changed the behaviour of this method to not only affect the
PostMachineScheduler scheduler but also the Po

Rename TargetSubtargetInfo::enablePostMachineScheduler() to enablePostRAScheduler()

r213101 changed the behaviour of this method to not only affect the
PostMachineScheduler scheduler but also the PostRAScheduler scheduler,
renaming should make this fact clear. Also document that the preferred
way is to specify this in the scheduling model instead of overriding
this method.

Differential Revision: http://reviews.llvm.org/D10427

llvm-svn: 239659

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# a73f1fdb 10-Jun-2015 Daniel Sanders <daniel.sanders@imgtec.com>

Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MCSubtargetInfo(). NFC.

Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the inter

Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MCSubtargetInfo(). NFC.

Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rafael

Reviewed By: rafael

Subscribers: rafael, ted, jfb, llvm-commits, rengolin, jholewinski

Differential Revision: http://reviews.llvm.org/D10311

llvm-svn: 239467

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Revision tags: llvmorg-3.6.1, llvmorg-3.6.1-rc1
# 506cfd0b 07-May-2015 Toma Tabacu <toma.tabacu@imgtec.com>

[mips] Add the SoftFloat MipsSubtarget feature.

Summary: This will enable the IAS to reject floating point instructions if soft-float is enabled.

Reviewers: dsanders, echristo

Reviewed By: dsander

[mips] Add the SoftFloat MipsSubtarget feature.

Summary: This will enable the IAS to reject floating point instructions if soft-float is enabled.

Reviewers: dsanders, echristo

Reviewed By: dsanders

Subscribers: jfb, llvm-commits, mpf

Differential Revision: http://reviews.llvm.org/D9053

llvm-svn: 236713

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Revision tags: llvmorg-3.5.2, llvmorg-3.5.2-rc1, llvmorg-3.6.0
# 0218f8cf 20-Feb-2015 Eric Christopher <echristo@gmail.com>

Fix wording and grammar in Mips subtarget options.

llvm-svn: 230001


Revision tags: llvmorg-3.6.0-rc4
# bbe6ff50 18-Feb-2015 Eric Christopher <echristo@gmail.com>

Unify selectMipsCPU implementations.

llvm-svn: 229595


Revision tags: llvmorg-3.6.0-rc3, llvmorg-3.6.0-rc2
# 8b770651 26-Jan-2015 Eric Christopher <echristo@gmail.com>

Move DataLayout back to the TargetMachine from TargetSubtargetInfo
derived classes.

Since global data alignment, layout, and mangling is often based on the
DataLayout, move it to the TargetMachine.

Move DataLayout back to the TargetMachine from TargetSubtargetInfo
derived classes.

Since global data alignment, layout, and mangling is often based on the
DataLayout, move it to the TargetMachine. This ensures that global
data is going to be layed out and mangled consistently if the subtarget
changes on a per function basis. Prior to this all targets(*) have
had subtarget dependent code moved out and onto the TargetMachine.

*One target hasn't been migrated as part of this change: R600. The
R600 port has, as a subtarget feature, the size of pointers and
this affects global data layout. I've currently hacked in a FIXME
to enable progress, but the port needs to be updated to either pass
the 64-bitness to the TargetMachine, or fix the DataLayout to
avoid subtarget dependent features.

llvm-svn: 227113

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# a5762816 26-Jan-2015 Eric Christopher <echristo@gmail.com>

Move the Mips target to storing the ABI in the TargetMachine rather
than on MipsSubtargetInfo.

This required a bit of massaging in the MC level to handle this since
MC is a) largely a collection of

Move the Mips target to storing the ABI in the TargetMachine rather
than on MipsSubtargetInfo.

This required a bit of massaging in the MC level to handle this since
MC is a) largely a collection of disparate classes with no hierarchy,
and b) there's no overarching equivalent to the TargetMachine, instead
only the subtarget via MCSubtargetInfo (which is the base class of
TargetSubtargetInfo).

We're now storing the ABI in both the TargetMachine level and in the
MC level because the AsmParser and the TargetStreamer both need to
know what ABI we have to parse assembly and emit objects. The target
streamer has a pointer to the one in the asm parser and is updated
when the asm parser is created. This is fragile as the FIXME comment
notes, but shouldn't be a problem in practice since we always
create an asm parser before attempting to emit object code via the
assembler. The TargetMachine now contains the ABI so that the DataLayout
can be constructed dependent upon ABI.

All testcases have been updated to use the -target-abi command line
flag so that we can set the ABI without using a subtarget feature.

Should be no change visible externally here.

llvm-svn: 227102

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Revision tags: llvmorg-3.6.0-rc1
# 90724285 08-Jan-2015 Eric Christopher <echristo@gmail.com>

Make the TargetMachine in MipsSubtarget a reference rather
than a pointer to make unifying code a bit easier.

llvm-svn: 225459


# 8985ba91 19-Dec-2014 Eric Christopher <echristo@gmail.com>

Remove unused variable, initializer, and accessor.

llvm-svn: 224650


Revision tags: llvmorg-3.5.1, llvmorg-3.5.1-rc2
# 8edbcad8 12-Dec-2014 Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>

[mips] Enable code generation for MIPS-III.

Summary:
This commit enables the MIPS-III target and adds support for code
generation of SELECT nodes. We have to use pseudo-instructions with
custom inse

[mips] Enable code generation for MIPS-III.

Summary:
This commit enables the MIPS-III target and adds support for code
generation of SELECT nodes. We have to use pseudo-instructions with
custom inserters for these nodes as MIPS-III CPUs do not have
conditional-move instructions.

Depends on D6212

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6464

llvm-svn: 224128

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Revision tags: llvmorg-3.5.1-rc1
# b2dd15f8 11-Nov-2014 Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>

[mips] Add preliminary support for the MIPS II target.

Summary:
This patch enables code generation for the MIPS II target. Pre-Mips32
targets don't have the MUL instruction, so we add the correspond

[mips] Add preliminary support for the MIPS II target.

Summary:
This patch enables code generation for the MIPS II target. Pre-Mips32
targets don't have the MUL instruction, so we add the correspondent
pattern that uses the MULT/MFLO combination in order to retrieve the
product.

This is WIP as we don't support code generation for select nodes due to
the lack of conditional-move instructions.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6150

llvm-svn: 221686

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# b38db1ef 06-Nov-2014 Sasa Stankovic <Sasa.Stankovic@imgtec.com>

[mips] Add the following MIPS options that control gp-relative addressing of
small data items: -mgpopt, -mlocal-sdata, -mextern-sdata. Implement gp-relative
addressing for constants.

Differential Re

[mips] Add the following MIPS options that control gp-relative addressing of
small data items: -mgpopt, -mlocal-sdata, -mextern-sdata. Implement gp-relative
addressing for constants.

Differential Revision: http://reviews.llvm.org/D4903

llvm-svn: 221450

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# e2e25da4 24-Oct-2014 Daniel Sanders <daniel.sanders@imgtec.com>

[mips] Replace MipsABIEnum with a MipsABIInfo class.

Summary:
No functional change yet, it's just an object replacement for an enum.
It will allow us to gather ABI information in a single place so t

[mips] Replace MipsABIEnum with a MipsABIInfo class.

Summary:
No functional change yet, it's just an object replacement for an enum.
It will allow us to gather ABI information in a single place so that we can
start testing for properties of the ABI's instead of the ABI itself.

For example we will eventually be able to use:
ABI.MinStackAlignmentInBytes()
instead of:
(isABI_N32() || isABI_N64()) ? 16 : 8
which is clearer and more maintainable.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://reviews.llvm.org/D3341

llvm-svn: 220568

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# b1526600 19-Sep-2014 Eric Christopher <echristo@gmail.com>

constify the TargetMachine being passed through the Mips subtarget
creation.

llvm-svn: 218169


# 79cc1e3a 02-Sep-2014 Eric Christopher <echristo@gmail.com>

Reinstate "Nuke the old JIT."
Approved by Jim Grosbach, Lang Hames, Rafael Espindola.

This reinstates commits r215111, 215115, 215116, 215117, 215136.

llvm-svn: 216982


Revision tags: llvmorg-3.5.0, llvmorg-3.5.0-rc4, llvmorg-3.5.0-rc3
# feb61302 08-Aug-2014 Daniel Sanders <daniel.sanders@imgtec.com>

[mips] Invert the abicalls feature bit to be noabicalls so that it's possible for -mno-abicalls to take effect.

Also added the testcase that should have been in r215194.

This behaviour has surprise

[mips] Invert the abicalls feature bit to be noabicalls so that it's possible for -mno-abicalls to take effect.

Also added the testcase that should have been in r215194.

This behaviour has surprised me a few times now. The problem is that the
generated MipsSubtarget::ParseSubtargetFeatures() contains code like this:

if ((Bits & Mips::FeatureABICalls) != 0) IsABICalls = true;

so '-abicalls' means 'leave it at the default' and '+abicalls' means 'set it to
true'. In this case, (and the similar -modd-spreg case) I'd like the code to be

IsABICalls = (Bits & Mips::FeatureABICalls) != 0;

or possibly:

if ((Bits & Mips::FeatureABICalls) != 0)
IsABICalls = true;
else
IsABICalls = false;

and preferably arrange for 'Bits & Mips::FeatureABICalls' to be true by default
(on some triples).

llvm-svn: 215211

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# 35837ac9 08-Aug-2014 Daniel Sanders <daniel.sanders@imgtec.com>

[mips] Initial implementation of -mabicalls/-mno-abicalls.

This patch implements the main rules for -mno-abicalls such as reserving $gp,
and emitting the correct .option directive.

Patch by Matheus

[mips] Initial implementation of -mabicalls/-mno-abicalls.

This patch implements the main rules for -mno-abicalls such as reserving $gp,
and emitting the correct .option directive.

Patch by Matheus Almeida and Toma Tabacu

Differential Revision: http://reviews.llvm.org/D4231

llvm-svn: 215194

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# b9fd9ed3 07-Aug-2014 Eric Christopher <echristo@gmail.com>

Temporarily Revert "Nuke the old JIT." as it's not quite ready to
be deleted. This will be reapplied as soon as possible and before
the 3.6 branch date at any rate.

Approved by Jim Grosbach, Lang Ha

Temporarily Revert "Nuke the old JIT." as it's not quite ready to
be deleted. This will be reapplied as soon as possible and before
the 3.6 branch date at any rate.

Approved by Jim Grosbach, Lang Hames, Rafael Espindola.

This reverts commits r215111, 215115, 215116, 215117, 215136.

llvm-svn: 215154

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# f8b27c41 07-Aug-2014 Rafael Espindola <rafael.espindola@gmail.com>

Nuke the old JIT.

I am sure we will be finding bits and pieces of dead code for years to
come, but this is a good start.

Thanks to Lang Hames for making MCJIT a good replacement!

llvm-svn: 215111


Revision tags: llvmorg-3.5.0-rc2, llvmorg-3.5.0-rc1
# 4e7d1e7e 18-Jul-2014 Eric Christopher <echristo@gmail.com>

Fundamentally change the MipsSubtarget replacement machinery:

a) Move the replacement level decision to the target machine.
b) Create additional subtargets at the TargetMachine level to
cache and

Fundamentally change the MipsSubtarget replacement machinery:

a) Move the replacement level decision to the target machine.
b) Create additional subtargets at the TargetMachine level to
cache and make replacement easy.
c) Make the mips16 features obvious.
d) Remove the override logic as it no longer does anything.
e) Have MipsModuleDAGToDAGISel take only the target machine.
f) Have the constant islands pass grab the current subtarget
from the MachineFunction (via the TargetMachine) instead
of caching it.
g) Unconditionally initialize TLOF.
h) Remove the old complicated subtarget based resetting and
replace it with simple conditionals.

llvm-svn: 213430

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# e54f10ee 18-Jul-2014 Eric Christopher <echristo@gmail.com>

FrameLowering depends only upon the Subtarget, so only take a subtarget
during initialization.

llvm-svn: 213429


# 8924d27c 18-Jul-2014 Eric Christopher <echristo@gmail.com>

In preparation for replacing the whole subtarget on the target machine,
have target lowering take the subtarget explicitly.

llvm-svn: 213426


# 675cb4da 18-Jul-2014 Eric Christopher <echristo@gmail.com>

Make InstrInfo depend only upon the Subtarget getting passed in
rather than the TargetMachine.

llvm-svn: 213425


# f74faf42 18-Jul-2014 Eric Christopher <echristo@gmail.com>

Avoid caching the relocation model on the subtarget, this is for
two reasons:

a) we're already caching the target machine which contains it,
b) which relocation model you get is dependent upon wheth

Avoid caching the relocation model on the subtarget, this is for
two reasons:

a) we're already caching the target machine which contains it,
b) which relocation model you get is dependent upon whether or
not you ask before MCCodeGenInfo is constructed on the target
machine, so avoid any latent issues there.

llvm-svn: 213420

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# 7394e234 18-Jul-2014 Eric Christopher <echristo@gmail.com>

Avoid resetting the UseSoftFloat and FloatABIType on the TargetMachine
Options struct and move the comment to inMips16HardFloat. Use the
fact that we now know whether or not we cared about soft float

Avoid resetting the UseSoftFloat and FloatABIType on the TargetMachine
Options struct and move the comment to inMips16HardFloat. Use the
fact that we now know whether or not we cared about soft float to
set the libcalls.
Accordingly rename mipsSEUsesSoftFloat to abiUsesSoftFloat and
propagate since it's no longer CPU specific.

llvm-svn: 213335

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