- Added MCSubtargetInfo to capture subtarget features and scheduling
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize

- Added MCSubtargetInfo to capture subtarget features and scheduling
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
and hide more details from targets.

llvm-svn: 134257

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Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even th

Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.

The fix is to just have the clients explictly pass the CPU name!

llvm-svn: 134127

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Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality.

llvm-svn: 129612

Fix lines that have incorrect indentation or exceed 80 columns. There is no change in functionality.

llvm-svn: 129606

Remove (hopefully) all trailing whitespaces from the mips backend. Patch by Hatanaka, Akira

llvm-svn: 127003

reintroduce support for Mips "small" section handling. This is
implemented somewhat differently than before, but it should have
the same functionality and the previous testcase passes again.

llvm-

reintroduce support for Mips "small" section handling. This is
implemented somewhat differently than before, but it should have
the same functionality and the previous testcase passes again.

llvm-svn: 78900

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Restore some "small section" support code, reverting my patch from r76936.

llvm-svn: 78894

Remove -disable-mips-abicall and -enable-mips-absolute-call command-line
options, which don't appear to be useful. -enable-mips-absolute-call is
completely unused (and unless I'm mistaken, is suppo

Remove -disable-mips-abicall and -enable-mips-absolute-call command-line
options, which don't appear to be useful. -enable-mips-absolute-call is
completely unused (and unless I'm mistaken, is supposed to have the
same effect that -relocation-model=dynamic-no-pic should have),
and -disable-mips-abicall appears to be effectively a
synonym for -relocation-model=static. Adjust the few users of hasABICall
to checks which seem more appropriate. Update MipsSubtarget,
MipsTargetMachine, and MipselTargetMachine to synchronize with recent
changes.

llvm-svn: 77938

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Normalize Subtarget constructors to take a target triple string instead of
Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips,

Normalize Subtarget constructors to take a target triple string instead of
Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.

llvm-svn: 77918

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remove more remnants of small section support.

llvm-svn: 76936

Added support for fround, fextend and FP_TO_SINT

llvm-svn: 72483

Fixed Bug 2751
http://llvm.org/bugs/show_bug.cgi?id=2751

Abicall was enabled even when static code model was provided
in the command line.
The correct behavior is to disable abicall when static is

Fixed Bug 2751
http://llvm.org/bugs/show_bug.cgi?id=2751

Abicall was enabled even when static code model was provided
in the command line.
The correct behavior is to disable abicall when static is
specified.

llvm-svn: 56228

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Make option variables static, so they won't cause nameclash

llvm-svn: 55203

Removed SELECT_CC custom lowering. This is not needed anymore, the SELECT node
is lowered properly and covers everything LowerSELECT_CC did.
Added method printUnsignedImm in AsmPrinter to print uimm1

Removed SELECT_CC custom lowering. This is not needed anymore, the SELECT node
is lowered properly and covers everything LowerSELECT_CC did.
Added method printUnsignedImm in AsmPrinter to print uimm16 operands. This
avoid the ugly instruction by instruction checking in printOperand.
Added a swap instruction present in the allegrex core.
Added two conditional instructions present in the allegrex core : MOVZ and MOVN.
They both allow a more efficient SELECT operation for integers.
Also added SELECT patterns to optimize MOVZ and MOVN usage.
The brcond and setcc patterns were cleaned: redundant and suboptimal patterns
were
removed. The suboptimals were replaced by more efficient ones.
Fixed some instructions that were using immZExt16 instead of immSExt16.

llvm-svn: 54724

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Support added for ctlz intrinsic, test case added.

llvm-svn: 54516

Match raw "psp" triple target, as done by the homebrew toolchain.

llvm-svn: 54514

Added new features to represent specific instructions groups

llvm-svn: 54213

Added initial support for small sections on Mips.
Added gp_rel relocations to support addressing small section contents.
Added command line to specify small section threshold in bytes.

llvm-svn: 538

Added initial support for small sections on Mips.
Added gp_rel relocations to support addressing small section contents.
Added command line to specify small section threshold in bytes.

llvm-svn: 53869

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Added Subtarget support into RegisterInfo
Added HasABICall and HasAbsoluteCall (equivalent to gcc -mabicall and
-mno-shared). HasAbsoluteCall is not implemented but HasABICall is the
default for o3

Added Subtarget support into RegisterInfo
Added HasABICall and HasAbsoluteCall (equivalent to gcc -mabicall and
-mno-shared). HasAbsoluteCall is not implemented but HasABICall is the
default for o32 ABI. Now, both should help into a more accurate
relocation types implementation.
Added IsLinux is needed to choose between asm directives.
Instruction name strings cleanup.
AsmPrinter improved.

llvm-svn: 53551

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Fixed features usage.

llvm-svn: 53277

Several changes to Mips backend, experimental fp support being the most
important.
- Cleanup in the Subtarget info with addition of new features, not all support
yet, but they allow the future incl

Several changes to Mips backend, experimental fp support being the most
important.
- Cleanup in the Subtarget info with addition of new features, not all support
yet, but they allow the future inclusion of features easier. Among new features,
we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit
integer
and float registers, allegrex vector FPU (VFPU), single float only support.
- TargetMachine now detects allegrex core.
- Added allegrex (Mips32r2) sext_inreg instructions.
- *Added Float Point Instructions*, handling single float only, and
aliased accesses for 32-bit FPUs.
- Some cleanup in FP instruction formats and FP register classes.
- Calling conventions improved to support mips 32-bit EABI.
- Added Asm Printer support for fp cond codes.
- Added support for sret copy to a return register.
- EABI support added into LowerCALL and FORMAL_ARGS.
- MipsFunctionInfo now keeps a virtual register per function to track the
sret on function entry until function ret.
- MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...),
FP cond codes mapping and initial FP Branch Analysis.
- Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond,
FPCmp
- MipsTargetLowering : handling different FP classes, Allegrex support, sret
return copy, no homing location within EABI, non 32-bit stack objects
arguments, and asm constraint for float.

llvm-svn: 53146

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Some Mips minor fixes
Added support for mips little endian arch => mipsel

llvm-svn: 51923

Remove attribution from file headers, per discussion on llvmdev.

llvm-svn: 45418

Better processor definition

llvm-svn: 43749

support for Schedule included on Mips.td

llvm-svn: 41159