Reland "[mips][mt][6/7] Add support for mftr, mttr instructions.""

Unlike many other instructions, these instructions have aliases which
take coprocessor registers, gpr register, accumulator (and ds

Reland "[mips][mt][6/7] Add support for mftr, mttr instructions.""

Unlike many other instructions, these instructions have aliases which
take coprocessor registers, gpr register, accumulator (and dsp accumulator)
registers, floating point registers, floating point control registers and
coprocessor 2 data and control operands.

For the moment, these aliases are treated as pseudo instructions which are
expanded into the underlying instruction. As a result, disassembling these
instructions shows the underlying instruction and not the alias.

Reviewers: slthakur, atanasyan

Differential Revision: https://reviews.llvm.org/D35253

The last version of this patch broke one of the expensive checks buildbots,
this version changes the failing test/MC/Mips/mt/invalid.s and other invalid
tests to write the errors to a file and run FileCheck on that, rather than
relying on the 'not llvm-mc ... <%s 2>&1 | Filecheck %s' idiom.

Hopefully this will sarisfy the buildbot.

llvm-svn: 308023

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Revert "[mips][mt][6/7] Add support for mftr, mttr instructions."

This reverts r307836, it broke one of the buildbots. Reverting
while I investigate.

llvm-svn: 307939

[mips][mt][6/7] Add support for mftr, mttr instructions.

Unlike many other instructions, these instructions have aliases which
take coprocessor registers, gpr register, accumulator (and dsp accumula

[mips][mt][6/7] Add support for mftr, mttr instructions.

Unlike many other instructions, these instructions have aliases which
take coprocessor registers, gpr register, accumulator (and dsp accumulator)
registers, floating point registers, floating point control registers and
coprocessor 2 data and control operands.

For the moment, these aliases are treated as pseudo instructions which are
expanded into the underlying instruction. As a result, disassembling these
instructions shows the underlying instruction and not the alias.

Reviewers: slthakur, atanasyan

Differential Revision: https://reviews.llvm.org/D35253

llvm-svn: 307836

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[mips][mt][2/7] Implement .module and .set directives for the MT ASE.

This patch implements the .module and .set directives for the MT ASE,
notably that .module sets the relevant flags in .MIPS.abif

[mips][mt][2/7] Implement .module and .set directives for the MT ASE.

This patch implements the .module and .set directives for the MT ASE,
notably that .module sets the relevant flags in .MIPS.abiflags and .set
doesn't.

Reviewers: slthakur, atanasyan

Differential Revision: https://reviews.llvm.org/D35249

llvm-svn: 307716

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Move Object format code to lib/BinaryFormat.

This creates a new library called BinaryFormat that has all of
the headers from llvm/Support containing structure and layout
definitions for various type

Move Object format code to lib/BinaryFormat.

This creates a new library called BinaryFormat that has all of
the headers from llvm/Support containing structure and layout
definitions for various types of binary formats like dwarf, coff,
elf, etc as well as the code for identifying a file from its
magic.

Differential Revision: https://reviews.llvm.org/D33843

llvm-svn: 304864

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Sort the remaining #include lines in include/... and lib/....

I did this a long time ago with a janky python script, but now
clang-format has built-in support for this. I fed clang-format every
line

Sort the remaining #include lines in include/... and lib/....

I did this a long time ago with a janky python script, but now
clang-format has built-in support for this. I fed clang-format every
line with a #include and let it re-sort things according to the precise
LLVM rules for include ordering baked into clang-format these days.

I've reverted a number of files where the results of sorting includes
isn't healthy. Either places where we have legacy code relying on
particular include ordering (where possible, I'll fix these separately)
or where we have particular formatting around #include lines that
I didn't want to disturb in this patch.

This patch is *entirely* mechanical. If you get merge conflicts or
anything, just ignore the changes in this patch and run clang-format
over your #include lines in the files.

Sorry for any noise here, but it is important to keep these things
stable. I was seeing an increasing number of patches with irrelevant
re-ordering of #include lines because clang-format was used. This patch
at least isolates that churn, makes it easy to skip when resolving
conflicts, and gets us to a clean baseline (again).

llvm-svn: 304787

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[mips] MUL macro variations

[mips] MUL macro variations

Adds support for MUL macro variations.

Patch by: Srdjan Obucina

Reviewers: zoran.jovanovic, vkalintiris, dsanders, sdardis, obucina, seanbr

[mips] MUL macro variations

[mips] MUL macro variations

Adds support for MUL macro variations.

Patch by: Srdjan Obucina

Reviewers: zoran.jovanovic, vkalintiris, dsanders, sdardis, obucina, seanbruno

Differential Revision: https://reviews.llvm.org/D16807

llvm-svn: 294471

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[mips] Remove absolute size assertion for end directive

The .end <symbol> directive for MIPS marks the end of a symbol and sets the
symbol's size. Previously, the corresponding emitDirective handler

[mips] Remove absolute size assertion for end directive

The .end <symbol> directive for MIPS marks the end of a symbol and sets the
symbol's size. Previously, the corresponding emitDirective handler asserted
that a function's size could be evaluated to an absolute value at that point
in time.

This cannot be done with when directives like .align have been encountered,
instead set the function's size to the corresponding symbolic expression and
let ELFObjectWriter resolve the expression to an absolute value. This avoids
a redundant call to evaluateAsAbsolute.

llvm-svn: 294012

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[mips] Fix an initialization issue with MipsABIInfo in MipsTargetELFStreamer

DebugInfoDWARFTests is the only user so far which initializes the
MCObjectStreamer without initializing the ASMParser. Th

[mips] Fix an initialization issue with MipsABIInfo in MipsTargetELFStreamer

DebugInfoDWARFTests is the only user so far which initializes the
MCObjectStreamer without initializing the ASMParser. The MIPS backend
relies on the ASMParser to initialize the MipsABIInfo object and to
update the target streamer with it. This should turn the mips buildbots
green.

Reviewers: atanasyan, zoran.jovanovic

Differential Revision: https://reviews.llvm.org/D28025

llvm-svn: 293772

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[mips] Recommit: "N64 static relocation model support"

This patch makes one change to GOT handling and two changes to N64's
relocation model handling. Furthermore, the jumptable encodings have
been

[mips] Recommit: "N64 static relocation model support"

This patch makes one change to GOT handling and two changes to N64's
relocation model handling. Furthermore, the jumptable encodings have
been corrected for static N64.

Big GOT handling is now done via a new SDNode MipsGotHi - this node is
unconditionally lowered to an lui instruction.

The first change to N64's relocation handling is the lifting of the
restriction that N64 always uses PIC. Now it is possible to target static
environments.

The second change adds support for 64 bit symbols and enables them by
default. Previously N64 had patterns for sym32 mode only. In this mode all
symbols are assumed to have 32 bit addresses. sym32 mode support
is selectable with attribute 'sym32'. A follow on patch for clang will
add the necessary frontend parameter.

This partially resolves PR/23485.

Thanks to Brooks Davis for reporting the issue!

This version corrects a "Conditional jump or move depends on uninitialised
value(s)" error detected by valgrind present in the original commit.

Reviewers: dsanders, seanbruno, zoran.jovanovic, vkalintiris

Differential Revision: https://reviews.llvm.org/D23652

llvm-svn: 293279

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Revert "[mips] N64 static relocation model support"

This reverts commit r293164. There are multiple tests failing.

llvm-svn: 293170

[mips] N64 static relocation model support

This patch makes one change to GOT handling and two changes to N64's
relocation model handling. Furthermore, the jumptable encodings have
been corrected fo

[mips] N64 static relocation model support

This patch makes one change to GOT handling and two changes to N64's
relocation model handling. Furthermore, the jumptable encodings have
been corrected for static N64.

Big GOT handling is now done via a new SDNode MipsGotHi - this node is
unconditionally lowered to an lui instruction.

The first change to N64's relocation handling is the lifting of the
restriction that N64 always uses PIC. Now it is possible to target static
environments.

The second change adds support for 64 bit symbols and enables them by
default. Previously N64 had patterns for sym32 mode only. In this mode all
symbols are assumed to have 32 bit addresses. sym32 mode support
is selectable with attribute 'sym32'. A follow on patch for clang will
add the necessary frontend parameter.

This partially resolves PR/23485.

Thanks to Brooks Davis for reporting the issue!

Reviewers: dsanders, seanbruno, zoran.jovanovic, vkalintiris

Differential Revision: https://reviews.llvm.org/D23652

llvm-svn: 293164

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Revert "[mips] Honour -mno-odd-spreg for vector splat"

This reverts commit r291556. It was a mixture of two differentials and
was missing a test.

llvm-svn: 291562

[mips] Honour -mno-odd-spreg for vector splat

Previous the lowering of FILL_FW would use the MSA128W register class when
performing a vector splat. Instead it should be honouring -mno-odd-spreg and

[mips] Honour -mno-odd-spreg for vector splat

Previous the lowering of FILL_FW would use the MSA128W register class when
performing a vector splat. Instead it should be honouring -mno-odd-spreg and
only use the even registers when performing a splat from word to vector
register.

Logical follow-on from r230235.

This fixes PR/31369.

Reviewers: slthakur

Differential Revision: https://reviews.llvm.org/D28373

llvm-svn: 291556

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[mips][ias] Implement one N32 case (of two) for .cpsetup.

This patch implements the N32 case where -mno-shared is in effect. The case
where -mshared is in effect will be added later since doing that

[mips][ias] Implement one N32 case (of two) for .cpsetup.

This patch implements the N32 case where -mno-shared is in effect. The case
where -mshared is in effect will be added later since doing that now requires
additional changes to how we handle %hi(%neg(%gp_rel(foo))) expressions to
emit the three relocations as three relocations (currently only one of the
three would be emitted) which then requires further changes to our MCFixup
handling.

While we could fix both cases together, fixing the -mno-shared case allows us
to fix the ELFCLASS bug (where N32 incorrectly uses ELFCLASS64 instead of
ELFCLASS32) in a way that allows cpsetup.s to check for a correct output instead
of another incorrect output.

Reviewers: sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D21131

llvm-svn: 272652

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Move instances of std::function.

Or replace with llvm::function_ref if it's never stored. NFC intended.

llvm-svn: 272513

Don't pass a Reloc::Model to MC.

MC only needs to know if the output is PIC or not. It never has to
decide about creating GOTs and PLTs for example. The only thing that
MC itself uses this informati

Don't pass a Reloc::Model to MC.

MC only needs to know if the output is PIC or not. It never has to
decide about creating GOTs and PLTs for example. The only thing that
MC itself uses this information for is expanding "macros" in sparc and
mips. The rest I am pretty sure could be moved to CodeGen.

This is a cleanup and isolates the code from future changes to
Reloc::Model.

llvm-svn: 269909

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[mips][ias] EF_MIPS_MICROMIPS should iff microMIPS code was emitted.

Summary:
This fixes PR27682. Additionally, '.set micromips' by itself is not sufficient
to raise the EF_MIPS_MICROMIPS flag. It i

[mips][ias] EF_MIPS_MICROMIPS should iff microMIPS code was emitted.

Summary:
This fixes PR27682. Additionally, '.set micromips' by itself is not sufficient
to raise the EF_MIPS_MICROMIPS flag. It is also necessary to emit a microMIPS
instruction. This has also been fixed.

Reviewers: sdardis, vkalintiris, rafael

Subscribers: rafael, dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D20214

llvm-svn: 269639

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[mips][ias] Fix O32 .cprestore directive when inside .set noat region and offset is in range.

Summary:
This expands on r269179 to fix an additional case that was not covered by our
tests. The assemb

[mips][ias] Fix O32 .cprestore directive when inside .set noat region and offset is in range.

Summary:
This expands on r269179 to fix an additional case that was not covered by our
tests. The assembler temporary is not needed when the .cprestore offset fits
inside a simm16 and it is not an error to use it inside a '.set noat' in this
case.

Reviewers: emaste, seanbruno, sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D20199

llvm-svn: 269295

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[mips][ias] Correct ELF eflags when Octeon is the target.

Reviewers: sdardis

Subscribers: petarj, mpf, dsanders, spetrovic, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D18

[mips][ias] Correct ELF eflags when Octeon is the target.

Reviewers: sdardis

Subscribers: petarj, mpf, dsanders, spetrovic, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D18899

llvm-svn: 269283

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[mips][ias] Fix N32 and N64 .cprestore directive when inside .set noat region.

Summary:
r268058 unintentionally made the retrieval of the current assembler temporary
unconditional. This was fine for

[mips][ias] Fix N32 and N64 .cprestore directive when inside .set noat region.

Summary:
r268058 unintentionally made the retrieval of the current assembler temporary
unconditional. This was fine for the existing tests but it broke the cases
where the assembler temporary is not needed (N32/N64 or not PIC) and is
unavailable due to a '.set noat' directive.

This fixes FreeBSD's libc.

Reviewers: emaste, sdardis, seanbruno

Subscribers: dsanders, emaste, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D20093

llvm-svn: 269179

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[mips] Fix inconsistent .cprestore behaviour between direct object emission and assembling.

Summary:
Direct object emission has an initialization order problem where an
InitMCObjectFile is called af

[mips] Fix inconsistent .cprestore behaviour between direct object emission and assembling.

Summary:
Direct object emission has an initialization order problem where an
InitMCObjectFile is called after MipsTargetELFStreamer determines whether
PIC is enabled by default or not. There doesn't seem to be point that
initializes all cases so split the responsibility between
MipsTargetELFStreamer and MipsAsmPrinter.

Reviewers: sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D19728

llvm-svn: 268737

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[mips][ias] Only round section sizes when explicitly requested.

As requested by Rafael Espindola in his post-commit comments on r268036. This
makes the previous behaviour the default while still all

[mips][ias] Only round section sizes when explicitly requested.

As requested by Rafael Espindola in his post-commit comments on r268036. This
makes the previous behaviour the default while still allowing verification of
IAS.

llvm-svn: 268496

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[mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations.

Summary:
This is much closer to the way MIPS relocation expressions work
(%hi(foo + 2) rather than %hi(foo) + 2) and removes the

[mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations.

Summary:
This is much closer to the way MIPS relocation expressions work
(%hi(foo + 2) rather than %hi(foo) + 2) and removes the need for the
various bodges in MipsAsmParser::evaluateRelocExpr().

Removing those bodges ensures that the constant stored in MCValue is the
full 32 or 64-bit (depending on ABI) offset from the symbol. This will be used
to correct the %hi/%lo matching needed to sort the relocation table correctly.

As part of this:
* Gave MCExpr::print() the ability to omit parenthesis when emitting a
symbol reference inside a MipsMCExpr operator like %hi(X). Without this
we print things like %lo(($L1)).
* %hi(%neg(%gprel(X))) is now three MipsMCExpr's instead of one. Most of
the related special cases have been removed or moved to MipsMCExpr. We
can remove the rest as we gain support for the less common relocations
when they are not part of this specific combination.
* Renamed MipsMCExpr::VariantKind and the enum prefix ('VK_') to avoid confusion
with MCSymbolRefExpr::VariantKind and its prefix (also 'VK_').
* fixup_Mips_GOT_Local and fixup_Mips_GOT_Global were found to be identical
and merged into fixup_Mips_GOT.
* MO_GOT16 and MO_GOT turned out to be identical and have been merged into
MO_GOT.
* VK_Mips_GOT and VK_Mips_GOT16 turned out to be the same thing so they
have been merged into MEK_GOT

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D19716

llvm-svn: 268379

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[mips][ias] Move createCpRestoreMemOp to MipsTargetStreamer. NFC.

Summary:
This removes the temporary call to isIntegratedAssemblerRequired() which was
added recently. It's effect is now acheived di

[mips][ias] Move createCpRestoreMemOp to MipsTargetStreamer. NFC.

Summary:
This removes the temporary call to isIntegratedAssemblerRequired() which was
added recently. It's effect is now acheived directly in the MipsTargetStreamer
hierarchy.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D19715

llvm-svn: 268058

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