Code clean up: return vector by reference rather than by value. No functionality changes.

llvm-svn: 72950

Re-apply 72756 with fixes. One of those was introduced by we changed MachineInstrBuilder::addReg() interface.

llvm-svn: 72826

Temporarily revert 72756 for now.

llvm-svn: 72757

Fold preceding / trailing base inc / dec into the single load / store as well.

llvm-svn: 72756

Change MachineInstrBuilder::addReg() to take a flag instead of a list of
booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't ea

Change MachineInstrBuilder::addReg() to take a flag instead of a list of
booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.

I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).

llvm-svn: 71722

show more ...

Remove refs to non-DebugLoc versions of BuildMI from ARM.

llvm-svn: 64429

Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.

llvm-svn: 57006

Tidy up several unbeseeming casts from pointer to intptr_t.

llvm-svn: 55779

Rename MRegisterInfo to TargetRegisterInfo.

llvm-svn: 46930

rename MachineInstr::setInstrDescriptor -> setDesc

llvm-svn: 45871

rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695

Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor

llvm-svn: 45680

Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes

Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674

show more ...

Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm

llvm-svn: 45453

Remove attribution from file headers, per discussion on llvmdev.

llvm-svn: 45418

Avoid referencing deleted instruction.

llvm-svn: 42153

Remove clobbersPred. Add an OptionalDefOperand to instructions which have the 's' bit.

llvm-svn: 38501

Reflects the chanegs made to PredicateOperand.

llvm-svn: 37898

Add missing const qualifiers.

llvm-svn: 37342

Add PredicateOperand to all ARM instructions that have the condition field.

llvm-svn: 37066

Drop 'const'

llvm-svn: 36662

Use 'static const char' instead of 'static const int'.
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.

llvm-svn: 36652

Do not use typeinfo to identify pass in pass manager.

llvm-svn: 36632

Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.

llvm-svn: 36483

findRegisterUseOperand() changed.

llvm-svn: 35366