Revision tags: llvmorg-11.0.0, llvmorg-11.0.0-rc6 |
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7238faa4 |
| 06-Oct-2020 |
Jay Foad <jay.foad@amd.com> |
[AMDGPU] Add patterns for mad/mac legacy f32 instructions
Note that all subtargets up to GFX10.1 have v_mad_legacy_f32, but GFX8/9 lack v_mac_legacy_f32. GFX10.3 has no mad/mac f32 instructions at a
[AMDGPU] Add patterns for mad/mac legacy f32 instructions
Note that all subtargets up to GFX10.1 have v_mad_legacy_f32, but GFX8/9 lack v_mac_legacy_f32. GFX10.3 has no mad/mac f32 instructions at all.
Differential Revision: https://reviews.llvm.org/D88890
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528057c1 |
| 07-Oct-2020 |
Ronak Chauhan <RonakNilesh.Chauhan@amd.com> |
[AMDGPU] Support disassembly for AMDGPU kernel descriptors
Decode AMDGPU Kernel descriptors as assembler directives.
Reviewed By: scott.linder, jhenderson, kzhuravl
Differential Revision: https://
[AMDGPU] Support disassembly for AMDGPU kernel descriptors
Decode AMDGPU Kernel descriptors as assembler directives.
Reviewed By: scott.linder, jhenderson, kzhuravl
Differential Revision: https://reviews.llvm.org/D80713
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Revision tags: llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3 |
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91f503c3 |
| 16-Sep-2020 |
Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> |
[AMDGPU] gfx1030 RT support
Differential Revision: https://reviews.llvm.org/D87782
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f078577f |
| 09-Sep-2020 |
Ronak Chauhan <RonakNilesh.Chauhan@amd.com> |
Revert "[AMDGPU] Support disassembly for AMDGPU kernel descriptors"
This reverts commit 487a80531006add8102d50dbcce4b6fd729ab1f6.
Tests fail on big endian machines.
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487a8053 |
| 07-Sep-2020 |
Ronak Chauhan <RonakNilesh.Chauhan@amd.com> |
[AMDGPU] Support disassembly for AMDGPU kernel descriptors
Decode AMDGPU Kernel descriptors as assembler directives.
Reviewed By: scott.linder, jhenderson, kzhuravl
Differential Revision: https://
[AMDGPU] Support disassembly for AMDGPU kernel descriptors
Decode AMDGPU Kernel descriptors as assembler directives.
Reviewed By: scott.linder, jhenderson, kzhuravl
Differential Revision: https://reviews.llvm.org/D80713
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Revision tags: llvmorg-11.0.0-rc2 |
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fdf71d48 |
| 19-Aug-2020 |
Ronak Chauhan <RonakNilesh.Chauhan@amd.com> |
Revert "[AMDGPU] Support disassembly for AMDGPU kernel descriptors"
This reverts commit cacfb02d28a3cabd4e45d2535cb0686cef48a2c9.
Reverting due to buildbot failures.
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Revision tags: llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2 |
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cacfb02d |
| 19-Jun-2020 |
Ronak Chauhan <RonakNilesh.Chauhan@amd.com> |
[AMDGPU] Support disassembly for AMDGPU kernel descriptors
Decode AMDGPU Kernel descriptors as assembler directives.
Reviewed By: scott.linder
Differential Revision: https://reviews.llvm.org/D80713
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9ee272f1 |
| 15-Jun-2020 |
Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> |
[AMDGPU] Add gfx1030 target
Differential Revision: https://reviews.llvm.org/D81886
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bab5dadf |
| 28-May-2020 |
Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> |
[AMDGPU][MC][DISASSEMBLER] Corrected decoder to consume each code fragment only once
Summary: disabled disassembly of successfully decoded fragments of code.
See detailed bug description: https://b
[AMDGPU][MC][DISASSEMBLER] Corrected decoder to consume each code fragment only once
Summary: disabled disassembly of successfully decoded fragments of code.
See detailed bug description: https://bugs.llvm.org/show_bug.cgi?id=46101
Reviewers: arsenm, rampitec
Differential Revision: https://reviews.llvm.org/D80637
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Revision tags: llvmorg-10.0.1-rc1 |
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5998bacc |
| 06-May-2020 |
Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> |
[AMDGPU][MC][GFX9+] Enabled 21-bit signed offsets for SMEM instructions
Reviewers: arsenm, rampitec
Differential Revision: https://reviews.llvm.org/D79288
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d625b4b0 |
| 17-Apr-2020 |
Jay Foad <jay.foad@amd.com> |
[AMDGPU] Add missing AReg classes
Add 96-bit, 160-bit and 256-bit AReg classes to match VReg and SReg. NFC as far as I know, but it may avoid weird legalization problems.
Differential Revision: htt
[AMDGPU] Add missing AReg classes
Add 96-bit, 160-bit and 256-bit AReg classes to match VReg and SReg. NFC as far as I know, but it may avoid weird legalization problems.
Differential Revision: https://reviews.llvm.org/D78348
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Revision tags: llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3, llvmorg-10.0.0-rc2 |
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453a8f3a |
| 11-Feb-2020 |
Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> |
[AMDGPU] Remove AMDGPURegisterInfo
R600 and GCN do not have anything in common in terms of register file organization anymore.
Differential Revision: https://reviews.llvm.org/D74426
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09d26b79 |
| 11-Feb-2020 |
diggerlin <digger.llvm@gmail.com> |
[NFC] Refactor the tuple of symbol information with structure for llvm-objdump
SUMMARY:
refator the std::tuple<uint64_t, StringRef, uint8_t> to structor
Reviewers: daltenty Subscribers: wuzish, ne
[NFC] Refactor the tuple of symbol information with structure for llvm-objdump
SUMMARY:
refator the std::tuple<uint64_t, StringRef, uint8_t> to structor
Reviewers: daltenty Subscribers: wuzish, nemanjai, hiraditya
Differential Revision: https://reviews.llvm.org/D74240
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Revision tags: llvmorg-10.0.0-rc1, llvmorg-11-init |
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0dbcb363 |
| 15-Jan-2020 |
Tom Stellard <tstellar@redhat.com> |
CMake: Make most target symbols hidden by default
Summary: For builds with LLVM_BUILD_LLVM_DYLIB=ON and BUILD_SHARED_LIBS=OFF this change makes all symbols in the target specific libraries hidden by
CMake: Make most target symbols hidden by default
Summary: For builds with LLVM_BUILD_LLVM_DYLIB=ON and BUILD_SHARED_LIBS=OFF this change makes all symbols in the target specific libraries hidden by default.
A new macro called LLVM_EXTERNAL_VISIBILITY has been added to mark symbols in these libraries public, which is mainly needed for the definitions of the LLVMInitialize* functions.
This patch reduces the number of public symbols in libLLVM.so by about 25%. This should improve load times for the dynamic library and also make abi checker tools, like abidiff require less memory when analyzing libLLVM.so
One side-effect of this change is that for builds with LLVM_BUILD_LLVM_DYLIB=ON and LLVM_LINK_LLVM_DYLIB=ON some unittests that access symbols that are no longer public will need to be statically linked.
Before and after public symbol counts (using gcc 8.2.1, ld.bfd 2.31.1): nm before/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l 36221 nm after/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l 26278
Reviewers: chandlerc, beanz, mgorny, rnk, hans
Reviewed By: rnk, hans
Subscribers: merge_guards_bot, luismarques, smeenai, ldionne, lenary, s.egerton, pzheng, sameer.abuasal, MaskRay, wuzish, echristo, Jim, hiraditya, michaelplatings, chapuni, jholewinski, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, javed.absar, sbc100, jgravelle-google, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, mgrang, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, kristina, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D54439
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6fdd6a7b |
| 11-Jan-2020 |
Fangrui Song <maskray@google.com> |
[Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()
The argument is llvm::null() everywhere except llvm::errs() in llvm-objdump in -DLLVM_ENABLE_ASSERTIONS=On builds. It
[Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()
The argument is llvm::null() everywhere except llvm::errs() in llvm-objdump in -DLLVM_ENABLE_ASSERTIONS=On builds. It is used by no target but X86 in -DLLVM_ENABLE_ASSERTIONS=On builds.
If we ever have the needs to add verbose log to disassemblers, we can record log with a member function, instead of passing it around as an argument.
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Revision tags: llvmorg-9.0.1, llvmorg-9.0.1-rc3, llvmorg-9.0.1-rc2 |
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7847986c |
| 04-Dec-2019 |
Jay Foad <jay.foad@amd.com> |
[AMDGPU][MC] Remove duplicate code introduced in r359316.
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Revision tags: llvmorg-9.0.1-rc1 |
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de56a890 |
| 04-Nov-2019 |
Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> |
[AMDGPU] return Fail instead of SolfFail from addOperand()
addOperand() method of AMDGPU disassembler returns SoftFail on error. All instances which may lead to that place are an impossible encdoing
[AMDGPU] return Fail instead of SolfFail from addOperand()
addOperand() method of AMDGPU disassembler returns SoftFail on error. All instances which may lead to that place are an impossible encdoing, not something which is possible to encode, but semantically incorrect as described for SoftFail.
Then tablegen generates a check of the following form:
if (Decode...(..) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
Since we can only return Success and SoftFail that is dead code as detected by the static code analyzer.
Solution: return Fail as it should be.
See https://bugs.llvm.org/show_bug.cgi?id=43886
Differential Revision: https://reviews.llvm.org/D69819
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434d5925 |
| 04-Oct-2019 |
Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> |
[AMDGPU][MC][GFX10][WS32] Corrected decoding of dst operand for v_cmp_*_sdwa opcodes
See bug 43484: https://bugs.llvm.org/show_bug.cgi?id=43484
Reviewers: arsenm, rampitec
Differential Revision: h
[AMDGPU][MC][GFX10][WS32] Corrected decoding of dst operand for v_cmp_*_sdwa opcodes
See bug 43484: https://bugs.llvm.org/show_bug.cgi?id=43484
Reviewers: arsenm, rampitec
Differential Revision: https://reviews.llvm.org/D68349
llvm-svn: 373745
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9bd76367 |
| 04-Oct-2019 |
Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> |
[AMDGPU][MC][GFX10] Enabled decoding of 'null' operand
See bug 43485: https://bugs.llvm.org/show_bug.cgi?id=43485
Reviewers: arsenm, rampitec
Differential Revision: https://reviews.llvm.org/D68348
[AMDGPU][MC][GFX10] Enabled decoding of 'null' operand
See bug 43485: https://bugs.llvm.org/show_bug.cgi?id=43485
Reviewers: arsenm, rampitec
Differential Revision: https://reviews.llvm.org/D68348
llvm-svn: 373740
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Revision tags: llvmorg-9.0.0, llvmorg-9.0.0-rc6, llvmorg-9.0.0-rc5, llvmorg-9.0.0-rc4, llvmorg-9.0.0-rc3, llvmorg-9.0.0-rc2, llvmorg-9.0.0-rc1, llvmorg-10-init |
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50d7f464 |
| 09-Jul-2019 |
Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> |
[AMDGPU] gfx908 mAI instructions, MC part
Differential Revision: https://reviews.llvm.org/D64446
llvm-svn: 365563
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9e77d0c6 |
| 09-Jul-2019 |
Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> |
[AMDGPU] gfx908 register file changes
Differential Revision: https://reviews.llvm.org/D64438
llvm-svn: 365546
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Revision tags: llvmorg-8.0.1, llvmorg-8.0.1-rc4, llvmorg-8.0.1-rc3 |
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0846c125 |
| 20-Jun-2019 |
Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> |
[AMDGPU] gfx1010 core wave32 changes
Differential Revision: https://reviews.llvm.org/D63204
llvm-svn: 363934
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ab4f2ea7 |
| 18-Jun-2019 |
Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> |
[AMDGPU] gfx1010 disassembler changes for wave32
Differential Revision: https://reviews.llvm.org/D63506
llvm-svn: 363721
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245b5ba3 |
| 12-Jun-2019 |
Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> |
[AMDGPU] gfx1010 dpp16 and dpp8
Differential Revision: https://reviews.llvm.org/D63203
llvm-svn: 363186
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Revision tags: llvmorg-8.0.1-rc2 |
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4b0b2619 |
| 11-Jun-2019 |
Tom Stellard <tstellar@redhat.com> |
Revert CMake: Make most target symbols hidden by default
This reverts r362990 (git commit 374571301dc8e9bc9fdd1d70f86015de198673bd)
This was causing linker warnings on Darwin:
ld: warning: direct
Revert CMake: Make most target symbols hidden by default
This reverts r362990 (git commit 374571301dc8e9bc9fdd1d70f86015de198673bd)
This was causing linker warnings on Darwin:
ld: warning: direct access in function 'llvm::initializeEvexToVexInstPassPass(llvm::PassRegistry&)' from file '../../lib/libLLVMX86CodeGen.a(X86EvexToVex.cpp.o)' to global weak symbol 'void std::__1::__call_once_proxy<std::__1::tuple<void* (&)(llvm::PassRegistry&), std::__1::reference_wrapper<llvm::PassRegistry>&&> >(void*)' from file '../../lib/libLLVMCore.a(Verifier.cpp.o)' means the weak symbol cannot be overridden at runtime. This was likely caused by different translation units being compiled with different visibility settings.
llvm-svn: 363028
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