#
15e9a6c2 |
| 08-Sep-2020 |
Francesco Petrogalli <francesco.petrogalli@arm.com> |
[llvm][CodeGen] Do not scalarize `llvm.masked.[gather|scatter]` operating on scalable vectors.
This patch prevents the `llvm.masked.gather` and `llvm.masked.scatter` intrinsics to be scalarized when
[llvm][CodeGen] Do not scalarize `llvm.masked.[gather|scatter]` operating on scalable vectors.
This patch prevents the `llvm.masked.gather` and `llvm.masked.scatter` intrinsics to be scalarized when invoked on scalable vectors.
The change in `Function.cpp` is needed to prevent the warning that is raised when `getNumElements` is used in place of `getElementCount` on `VectorType` instances. The tests guards for regressions on this change.
The tests makes sure that calls to `llvm.masked.[gather|scatter]` are still scalarized when:
# the intrinsics are operating on fixed size vectors, and # the compiler is not targeting fixed length SVE code generation.
Reviewed By: efriedma, sdesmalen
Differential Revision: https://reviews.llvm.org/D86249
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Revision tags: llvmorg-11.0.0-rc2 |
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#
f4257c58 |
| 14-Aug-2020 |
David Sherwood <david.sherwood@arm.com> |
[SVE] Make ElementCount members private
This patch changes ElementCount so that the Min and Scalable members are now private and can only be accessed via the get functions getKnownMinValue() and isS
[SVE] Make ElementCount members private
This patch changes ElementCount so that the Min and Scalable members are now private and can only be accessed via the get functions getKnownMinValue() and isScalable(). In addition I've added some other member functions for more commonly used operations. Hopefully this makes the class more useful and will reduce the need for calling getKnownMinValue().
Differential Revision: https://reviews.llvm.org/D86065
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#
5a55e278 |
| 27-Aug-2020 |
Christopher Tetreault <ctetreau@quicinc.com> |
[SVE] Remove calls to VectorType::getNumElements from IR
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D81500
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Revision tags: llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2 |
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#
2a6c8715 |
| 03-Jun-2020 |
Sebastian Neubauer <sebastian.neubauer@amd.com> |
[InstCombine] Move target-specific inst combining
For a long time, the InstCombine pass handled target specific intrinsics. Having target specific code in general passes was noted as an area for imp
[InstCombine] Move target-specific inst combining
For a long time, the InstCombine pass handled target specific intrinsics. Having target specific code in general passes was noted as an area for improvement for a long time.
D81728 moves most target specific code out of the InstCombine pass. Applying the target specific combinations in an extra pass would probably result in inferior optimizations compared to the current fixed-point iteration, therefore the InstCombine pass resorts to newly introduced functions in the TargetTransformInfo when it encounters unknown intrinsics. The patch should not have any effect on generated code (under the assumption that code never uses intrinsics from a foreign target).
This introduces three new functions: TargetTransformInfo::instCombineIntrinsic TargetTransformInfo::simplifyDemandedUseBitsIntrinsic TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic
A few target specific parts are left in the InstCombine folder, where it makes sense to share code. The largest left-over part in InstCombineCalls.cpp is the code shared between arm and aarch64.
This allows to move about 3000 lines out from InstCombine to the targets.
Differential Revision: https://reviews.llvm.org/D81728
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#
5e999cbe |
| 05-Jun-2020 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
IR: Define byref parameter attribute
This allows tracking the in-memory type of a pointer argument to a function for ABI purposes. This is essentially a stripped down version of byval to remove some
IR: Define byref parameter attribute
This allows tracking the in-memory type of a pointer argument to a function for ABI purposes. This is essentially a stripped down version of byval to remove some of the stack-copy implications in its definition.
This includes the base IR changes, and some tests for places where it should be treated similarly to byval. Codegen support will be in a future patch.
My original attempt at solving some of these problems was to repurpose byval with a different address space from the stack. However, it is technically permitted for the callee to introduce a write to the argument, although nothing does this in reality. There is also talk of removing and replacing the byval attribute, so a new attribute would need to take its place anyway.
This is intended avoid some optimization issues with the current handling of aggregate arguments, as well as fixes inflexibilty in how frontends can specify the kernel ABI. The most honest representation of the amdgpu_kernel convention is to expose all kernel arguments as loads from constant memory. Today, these are raw, SSA Argument values and codegen is responsible for turning these into loads.
Background:
There currently isn't a satisfactory way to represent how arguments for the amdgpu_kernel calling convention are passed. In reality, arguments are passed in a single, flat, constant memory buffer implicitly passed to the function. It is also illegal to call this function in the IR, and this is only ever invoked by a driver of some kind.
It does not make sense to have a stack passed parameter in this context as is implied by byval. It is never valid to write to the kernel arguments, as this would corrupt the inputs seen by other dispatches of the kernel. These argumets are also not in the same address space as the stack, so a copy is needed to an alloca. From a source C-like language, the kernel parameters are invisible. Semantically, a copy is always required from the constant argument memory to a mutable variable.
The current clang calling convention lowering emits raw values, including aggregates into the function argument list, since using byval would not make sense. This has some unfortunate consequences for the optimizer. In the aggregate case, we end up with an aggregate store to alloca, which both SROA and instcombine turn into a store of each aggregate field. The optimizer never pieces this back together to see that this is really just a copy from constant memory, so we end up stuck with expensive stack usage.
This also means the backend dictates the alignment of arguments, and arbitrarily picks the LLVM IR ABI type alignment. By allowing an explicit alignment, frontends can make better decisions. For example, there's real no advantage to an aligment higher than 4, so a frontend could choose to compact the argument layout. Similarly, there is a high penalty to using an alignment lower than 4, so a frontend could opt into more padding for small arguments.
Another design consideration is when it is appropriate to expose the fact that these arguments are all really passed in adjacent memory. Currently we have a late IR optimization pass in codegen to rewrite the kernel argument values into explicit loads to enable vectorization. In most programs, unrelated argument loads can be merged together. However, exposing this property directly from the frontend has some disadvantages. We still need a way to track the original argument sizes and alignments to report to the driver. I find using some side-channel, metadata mechanism to track this unappealing. If the kernel arguments were exposed as a single buffer to begin with, alias analysis would be unaware that the padding bits betewen arguments are meaningless. Another family of problems is there are still some gaps in replacing all of the available parameter attributes with metadata equivalents once lowered to loads.
The immediate plan is to start using this new attribute to handle all aggregate argumets for kernels. Long term, it makes sense to migrate all kernel arguments, including scalars, to be passed indirectly in the same manner.
Additional context is in D79744.
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#
023883a8 |
| 29-Jun-2020 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
IR: Rename Argument::hasPassPointeeByValueAttr to prepare for byref
When the byref attribute is added, there will need to be two similar functions for the existing cases which have an associate valu
IR: Rename Argument::hasPassPointeeByValueAttr to prepare for byref
When the byref attribute is added, there will need to be two similar functions for the existing cases which have an associate value copy, and byref which does not. Most, but not all of the existing uses will use the existing version.
The associated size function added by D82679 also needs to contextually differ, and will help eliminate a few places still relying on pointee element types.
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#
aef60af3 |
| 08-Jul-2020 |
Giorgis Georgakoudis <georgakoudis1@llnl.gov> |
[CallGraph] Ignore callback uses
Summary: Ignore callback uses when adding a callback function in the CallGraph. Callback functions are typically created when outlining, e.g. for OpenMP, so they hav
[CallGraph] Ignore callback uses
Summary: Ignore callback uses when adding a callback function in the CallGraph. Callback functions are typically created when outlining, e.g. for OpenMP, so they have internal scope and linkage. They should not be added to the ExternalCallingNode since they are only callable by the specified caller function at creation time.
A CGSCC pass, such as OpenMPOpt, may need to update the CallGraph by adding a new outlined callback function. Without ignoring callback uses, adding breaks CGSCC pass restrictions and results to a broken CallGraph.
Reviewers: jdoerfert
Subscribers: hiraditya, sstefan1, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D83370
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#
c2a61ef3 |
| 09-Jul-2020 |
Roman Lebedev <lebedev.ri@gmail.com> |
Revert "[CallGraph] Ignore callback uses"
This likely has broken test/Transforms/Attributor/IPConstantProp/ tests. http://45.33.8.238/linux/22502/step_12.txt
This reverts commit 205dc0922d5f7305226
Revert "[CallGraph] Ignore callback uses"
This likely has broken test/Transforms/Attributor/IPConstantProp/ tests. http://45.33.8.238/linux/22502/step_12.txt
This reverts commit 205dc0922d5f7305226f7457fcbcb4224c92530c.
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#
205dc092 |
| 08-Jul-2020 |
Giorgis Georgakoudis <georgakoudis1@llnl.gov> |
[CallGraph] Ignore callback uses
Summary: Ignore callback uses when adding a callback function in the CallGraph. Callback functions are typically created when outlining, e.g. for OpenMP, so they hav
[CallGraph] Ignore callback uses
Summary: Ignore callback uses when adding a callback function in the CallGraph. Callback functions are typically created when outlining, e.g. for OpenMP, so they have internal scope and linkage. They should not be added to the ExternalCallingNode since they are only callable by the specified caller function at creation time.
A CGSCC pass, such as OpenMPOpt, may need to update the CallGraph by adding a new outlined callback function. Without ignoring callback uses, adding breaks CGSCC pass restrictions and results to a broken CallGraph.
Reviewers: jdoerfert
Subscribers: hiraditya, sstefan1, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D83370
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#
6f5d9136 |
| 26-Jun-2020 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
OpaquePtr: Don't check pointee type for byval/preallocated
Since none of these users really care about the actual type, hide the type under a new size-getting attribute to go along with hasPassPoint
OpaquePtr: Don't check pointee type for byval/preallocated
Since none of these users really care about the actual type, hide the type under a new size-getting attribute to go along with hasPassPointeeByValueAttr. This will work better for the future byref attribute, which may end up only tracking the byte size and not the IR type.
We currently have 3 parameter attributes that should carry the type (technically inalloca does not yet). The APIs are somewhat awkward since preallocated/inalloca piggyback on byval in some places, but in others are treated as distinct attributes. Since these are all mutually exclusive, we should probably just merge all the attribute infrastructure treating these as totally distinct attributes.
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#
6d01a941 |
| 29-Jun-2020 |
Reid Kleckner <rnk@google.com> |
Silence unused var warning in NDEBUG build
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#
874fcd4e |
| 12-Jun-2020 |
Sebastian Neubauer <sebastian.neubauer@amd.com> |
Add intrinsic helper function
It simplifies getting generic argument types from intrinsics.
Differential Revision: https://reviews.llvm.org/D81084
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#
a3e3986b |
| 02-Jun-2020 |
David Sherwood <david.sherwood@arm.com> |
[SVE] Fix ubsan issues in DecodeIITType
In an earlier patch I removed the need for IITDescriptor::ScalableVecArgument, which involved changing DecodeIITType to pull out the last IIT_Info from the li
[SVE] Fix ubsan issues in DecodeIITType
In an earlier patch I removed the need for IITDescriptor::ScalableVecArgument, which involved changing DecodeIITType to pull out the last IIT_Info from the list. However, it turns out this is unsafe and causes ubsan failures. I've tried to fix this a different way by simply passing the last IIT_Info as an additional argument to DecodeIITType.
Differential Revision: https://reviews.llvm.org/D81057
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#
ad5d319e |
| 27-May-2020 |
Ties Stuij <ties.stuij@arm.com> |
[IR][BFloat] add BFloat IR intrinsics support
Summary: This patch is part of a series that adds support for the Bfloat16 extension of the Armv8.6-a architecture, as detailed here:
https://community
[IR][BFloat] add BFloat IR intrinsics support
Summary: This patch is part of a series that adds support for the Bfloat16 extension of the Armv8.6-a architecture, as detailed here:
https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a
The bfloat type, and its properties are specified in the Arm Architecture Reference Manual:
https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile
Reviewers: scanon, fpetrogalli, sdesmalen, craig.topper, LukeGeeson
Reviewed By: fpetrogalli
Subscribers: LukeGeeson, pbarrio, kristof.beyls, hiraditya, jdoerfert, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D79707
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Revision tags: llvmorg-10.0.1-rc1 |
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#
1c3d9c2f |
| 15-May-2020 |
David Sherwood <david.sherwood@arm.com> |
[SVE] Remove IITDescriptor::ScalableVecArgument
I have refactored the code so that we no longer need the ScalableVecArgument descriptor - the scalable property of vectors is now encoded using the El
[SVE] Remove IITDescriptor::ScalableVecArgument
I have refactored the code so that we no longer need the ScalableVecArgument descriptor - the scalable property of vectors is now encoded using the ElementCount class in IITDescriptor. This means that when matching intrinsics we know precisely how to match the arguments and return values.
Differential Revision: https://reviews.llvm.org/D80107
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Revision tags: llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5 |
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#
8a887556 |
| 16-Mar-2020 |
Arthur Eubanks <aeubanks@google.com> |
Reland [X86] Codegen for preallocated
See https://reviews.llvm.org/D74651 for the preallocated IR constructs and LangRef changes.
In X86TargetLowering::LowerCall(), if a call is preallocated, recor
Reland [X86] Codegen for preallocated
See https://reviews.llvm.org/D74651 for the preallocated IR constructs and LangRef changes.
In X86TargetLowering::LowerCall(), if a call is preallocated, record each argument's offset from the stack pointer and the total stack adjustment. Associate the call Value with an integer index. Store the info in X86MachineFunctionInfo with the integer index as the key.
This adds two new target independent ISDOpcodes and two new target dependent Opcodes corresponding to @llvm.call.preallocated.{setup,arg}.
The setup ISelDAG node takes in a chain and outputs a chain and a SrcValue of the preallocated call Value. It is lowered to a target dependent node with the SrcValue replaced with the integer index key by looking in X86MachineFunctionInfo. In X86TargetLowering::EmitInstrWithCustomInserter() this is lowered to an %esp adjustment, the exact amount determined by looking in X86MachineFunctionInfo with the integer index key.
The arg ISelDAG node takes in a chain, a SrcValue of the preallocated call Value, and the arg index int constant. It produces a chain and the pointer fo the arg. It is lowered to a target dependent node with the SrcValue replaced with the integer index key by looking in X86MachineFunctionInfo. In X86TargetLowering::EmitInstrWithCustomInserter() this is lowered to a lea of the stack pointer plus an offset determined by looking in X86MachineFunctionInfo with the integer index key.
Force any function containing a preallocated call to use the frame pointer.
Does not yet handle a setup without a call, or a conditional call. Does not yet handle musttail. That requires a LangRef change first.
Tried to look at all references to inalloca and see if they apply to preallocated. I've made preallocated versions of tests testing inalloca whenever possible and when they make sense (e.g. not alloca related, inalloca edge cases).
Aside from the tests added here, I checked that this codegen produces correct code for something like
``` struct A { A(); A(A&&); ~A(); };
void bar() { foo(foo(foo(foo(foo(A(), 4), 5), 6), 7), 8); } ```
by replacing the inalloca version of the .ll file with the appropriate preallocated code. Running the executable produces the same results as using the current inalloca implementation.
Reverted due to unexpectedly passing tests, added REQUIRES: asserts for reland.
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D77689
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#
b8cbff51 |
| 20-May-2020 |
Arthur Eubanks <aeubanks@google.com> |
Revert "[X86] Codegen for preallocated"
This reverts commit 810567dc691a57c8c13fef06368d7549f7d9c064.
Some tests are unexpectedly passing
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#
810567dc |
| 16-Mar-2020 |
Arthur Eubanks <aeubanks@google.com> |
[X86] Codegen for preallocated
See https://reviews.llvm.org/D74651 for the preallocated IR constructs and LangRef changes.
In X86TargetLowering::LowerCall(), if a call is preallocated, record each
[X86] Codegen for preallocated
See https://reviews.llvm.org/D74651 for the preallocated IR constructs and LangRef changes.
In X86TargetLowering::LowerCall(), if a call is preallocated, record each argument's offset from the stack pointer and the total stack adjustment. Associate the call Value with an integer index. Store the info in X86MachineFunctionInfo with the integer index as the key.
This adds two new target independent ISDOpcodes and two new target dependent Opcodes corresponding to @llvm.call.preallocated.{setup,arg}.
The setup ISelDAG node takes in a chain and outputs a chain and a SrcValue of the preallocated call Value. It is lowered to a target dependent node with the SrcValue replaced with the integer index key by looking in X86MachineFunctionInfo. In X86TargetLowering::EmitInstrWithCustomInserter() this is lowered to an %esp adjustment, the exact amount determined by looking in X86MachineFunctionInfo with the integer index key.
The arg ISelDAG node takes in a chain, a SrcValue of the preallocated call Value, and the arg index int constant. It produces a chain and the pointer fo the arg. It is lowered to a target dependent node with the SrcValue replaced with the integer index key by looking in X86MachineFunctionInfo. In X86TargetLowering::EmitInstrWithCustomInserter() this is lowered to a lea of the stack pointer plus an offset determined by looking in X86MachineFunctionInfo with the integer index key.
Force any function containing a preallocated call to use the frame pointer.
Does not yet handle a setup without a call, or a conditional call. Does not yet handle musttail. That requires a LangRef change first.
Tried to look at all references to inalloca and see if they apply to preallocated. I've made preallocated versions of tests testing inalloca whenever possible and when they make sense (e.g. not alloca related, inalloca edge cases).
Aside from the tests added here, I checked that this codegen produces correct code for something like
``` struct A { A(); A(A&&); ~A(); };
void bar() { foo(foo(foo(foo(foo(A(), 4), 5), 6), 7), 8); } ```
by replacing the inalloca version of the .ll file with the appropriate preallocated code. Running the executable produces the same results as using the current inalloca implementation.
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D77689
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#
f89f7da9 |
| 25-Apr-2020 |
Nikita Popov <nikita.ppv@gmail.com> |
[IR] Convert null-pointer-is-valid into an enum attribute
The "null-pointer-is-valid" attribute needs to be checked by many pointer-related combines. To make the check more efficient, convert it fro
[IR] Convert null-pointer-is-valid into an enum attribute
The "null-pointer-is-valid" attribute needs to be checked by many pointer-related combines. To make the check more efficient, convert it from a string into an enum attribute.
In the future, this attribute may be replaced with data layout properties.
Differential Revision: https://reviews.llvm.org/D78862
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#
8c24f331 |
| 31-Mar-2020 |
Ties Stuij <ties.stuij@arm.com> |
[IR][BFloat] Add BFloat IR type
Summary: The BFloat IR type is introduced to provide support for, initially, the BFloat16 datatype introduced with the Armv8.6 architecture (optional from Armv8.2 onw
[IR][BFloat] Add BFloat IR type
Summary: The BFloat IR type is introduced to provide support for, initially, the BFloat16 datatype introduced with the Armv8.6 architecture (optional from Armv8.2 onwards). It has an 8-bit exponent and a 7-bit mantissa and behaves like an IEEE 754 floating point IR type.
This is part of a patch series upstreaming Armv8.6 features. Subsequent patches will upstream intrinsics support and C-lang support for BFloat.
Reviewers: SjoerdMeijer, rjmccall, rsmith, liutianle, RKSimon, craig.topper, jfb, LukeGeeson, sdesmalen, deadalnix, ctetreau
Subscribers: hiraditya, llvm-commits, danielkiss, arphaman, kristof.beyls, dexonsmith
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D78190
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#
525b8e6d |
| 05-May-2020 |
David Sherwood <david.sherwood@arm.com> |
[SVE] Fix wrong usage of getNumElements() in matchIntrinsicType
I have changed the ScalableVecArgument case in matchIntrinsicType to create a new FixedVectorType. This means that the next case we hi
[SVE] Fix wrong usage of getNumElements() in matchIntrinsicType
I have changed the ScalableVecArgument case in matchIntrinsicType to create a new FixedVectorType. This means that the next case we hit (Vector) will not assert when calling getNumElements(), since we know that it's always a FixedVectorType. This is a temporary measure for now, and it will be fixed properly in another patch that refactors this code.
The changes are covered by this existing test:
CodeGen/AArch64/sve-intrinsics-fp-converts.ll
In addition, I have added a new test to ensure that we correctly reject SVE intrinsics when called with fixed length vector types.
Differential Revision: https://reviews.llvm.org/D79416
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#
a90948fd |
| 30-Apr-2020 |
Arthur Eubanks <aeubanks@google.com> |
[NFC] Rename *ByValOrInalloca* to *PassPointeeByValue*
Summary: In preparation for preallocated.
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D
[NFC] Rename *ByValOrInalloca* to *PassPointeeByValue*
Summary: In preparation for preallocated.
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D79152
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#
2e214bae |
| 28-Apr-2020 |
Christopher Tetreault <ctetreau@quicinc.com> |
[SVE] Remove invalid usage of VectorType::getNumElements in Function
Summary: Removes usage of VectorType::getNumElements identified by test located at CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c.
[SVE] Remove invalid usage of VectorType::getNumElements in Function
Summary: Removes usage of VectorType::getNumElements identified by test located at CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c. This code explicitly converts a potentially fixed length vector to scalable vector by constructing the ElementCount = {getNumElements(), true}
Reviewers: rengolin, efriedma, kmclaughlin, c-rhodes, sdesmalen
Reviewed By: efriedma
Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D78967
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#
3ecced16 |
| 23-Apr-2020 |
Christopher Tetreault <ctetreau@quicinc.com> |
[SVE] Remove calls to isScalable from IR
Reviewers: efriedma, sdesmalen, dexonsmith, dblaikie
Reviewed By: sdesmalen
Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits
Tags: #llvm
D
[SVE] Remove calls to isScalable from IR
Reviewers: efriedma, sdesmalen, dexonsmith, dblaikie
Reviewed By: sdesmalen
Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D77691
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#
3d178581 |
| 23-Apr-2020 |
Christopher Tetreault <ctetreau@quicinc.com> |
[SVE] Make VectorType::getNumElements() complain for scalable vectors
Summary: Piggy-back off of TypeSize's STRICT_FIXED_SIZE_VECTORS flag and: - if it is defined, assert that the vector is not scal
[SVE] Make VectorType::getNumElements() complain for scalable vectors
Summary: Piggy-back off of TypeSize's STRICT_FIXED_SIZE_VECTORS flag and: - if it is defined, assert that the vector is not scalable - if it is not defined, complain if the vector is scalable
Reviewers: efriedma, sdesmalen, c-rhodes
Reviewed By: sdesmalen
Subscribers: hiraditya, mgorny, tschuett, rkruppe, psnobl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D78576
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