[StackMap Liveness] No need to cache the MachineFunction. NFC.

Don't cache the MachineFunction in the pass and range'ify some loops.

llvm-svn: 241535

Internalize the StackMapLiveness pass.

No need to have its own header when it's not used anywhere. NFC.

llvm-svn: 233072

Another set of missing raw_ostream.h. Still no functional change.

llvm-svn: 232993

Fix uses of reserved identifiers starting with an underscore followed by an uppercase letter

This covers essentially all of llvm's headers and libs. One or two weird
cases I wasn't sure were worth/a

Fix uses of reserved identifiers starting with an underscore followed by an uppercase letter

This covers essentially all of llvm's headers and libs. One or two weird
cases I wasn't sure were worth/appropriate to fix.

llvm-svn: 232394

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[StackMaps] Allow the target to pre-process the live-out mask

Some targets, PowerPC for example, have pseudo-registers (such as that used to
represent the rounding mode), that don't have DWARF regis

[StackMaps] Allow the target to pre-process the live-out mask

Some targets, PowerPC for example, have pseudo-registers (such as that used to
represent the rounding mode), that don't have DWARF register numbers or a
register class. These are used only for internal dependency tracking, and
should not appear in the recorded live-outs. This adds a callback allowing the
target to pre-process the live-out mask in order to remove these kinds of
registers so that the StackMaps code does not complain about them and/or
attempt to include them in the output.

This will be used by the PowerPC target in a future commit.

llvm-svn: 225805

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Have MachineFunction cache a pointer to the subtarget to make lookups
shorter/easier and have the DAG use that to do the same lookup. This
can be used in the future for TargetMachine based caching lo

Have MachineFunction cache a pointer to the subtarget to make lookups
shorter/easier and have the DAG use that to do the same lookup. This
can be used in the future for TargetMachine based caching lookups from
the MachineFunction easily.

Update the MIPS subtarget switching machinery to update this pointer
at the same time it runs.

llvm-svn: 214838

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Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.

llvm-svn: 214781

[StackMaps] Enable patchpoint liveness analysis per default.

llvm-svn: 211817

[Stackmaps] Remove the liveness calculation for stackmap intrinsics.

There is no need to calculate the liveness information for stackmaps. The
liveness information is still available for the patchpo

[Stackmaps] Remove the liveness calculation for stackmap intrinsics.

There is no need to calculate the liveness information for stackmaps. The
liveness information is still available for the patchpoint intrinsic and
that is also the intended usage model.

Related to <rdar://problem/17473725>

llvm-svn: 211816

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[Modules] Remove potential ODR violations by sinking the DEBUG_TYPE
define below all header includes in the lib/CodeGen/... tree. While the
current modules implementation doesn't check for this kind

[Modules] Remove potential ODR violations by sinking the DEBUG_TYPE
define below all header includes in the lib/CodeGen/... tree. While the
current modules implementation doesn't check for this kind of ODR
violation yet, it is likely to grow support for it in the future. It
also removes one layer of macro pollution across all the included
headers.

Other sub-trees will follow.

llvm-svn: 206837

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Minor change to StackMapLiveness DEBUG output.

llvm-svn: 205656

[Stackmap] Liveness Analysis Pass

This optional register liveness analysis pass can be enabled with either
-enable-stackmap-liveness, -enable-patchpoint-liveness, or both. The pass
traverses each ba

[Stackmap] Liveness Analysis Pass

This optional register liveness analysis pass can be enabled with either
-enable-stackmap-liveness, -enable-patchpoint-liveness, or both. The pass
traverses each basic block in a machine function. For each basic block the
instructions are processed in reversed order and if a patchpoint or stackmap
instruction is encountered the current live-out register set is encoded as a
register mask and attached to the instruction.

Later on during stackmap generation the live-out register mask is processed and
also emitted as part of the stackmap.

This information is optional and intended for optimization purposes only. This
will enable a client of the stackmap to reason about the registers it can use
and which registers need to be preserved.

Reviewed by Andy

llvm-svn: 197317

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Liveness Analysis Pass

llvm-svn: 197254