#
76fb649b |
| 09-Aug-2017 |
David Blaikie <dblaikie@gmail.com> |
Reduce variable scope by moving declaration into if clause
llvm-svn: 310506
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#
29c67524 |
| 01-Aug-2017 |
Reid Kleckner <rnk@google.com> |
[DebugInfo] Don't turn dbg.declare into DBG_VALUE for static allocas
Summary: We already have information about static alloca stack locations in our side table. Emitting instructions for them is ine
[DebugInfo] Don't turn dbg.declare into DBG_VALUE for static allocas
Summary: We already have information about static alloca stack locations in our side table. Emitting instructions for them is inefficient, and it only happens when the address of the alloca has been materialized within the current block, which isn't often.
Reviewers: aprantl, probinson, dblaikie
Subscribers: jfb, dschuff, sbc100, jgravelle-google, hiraditya, llvm-commits, aheejin
Differential Revision: https://reviews.llvm.org/D36117
llvm-svn: 309729
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#
8930b4a0 |
| 31-Jul-2017 |
Simon Dardis <simon.dardis@imgtec.com> |
[SelectionDAG][mips] Fix PR33883
PR33883 shows that calls to intrinsic functions should not have their vector arguments or returns subject to ABI changes required by the target.
This resolves PR338
[SelectionDAG][mips] Fix PR33883
PR33883 shows that calls to intrinsic functions should not have their vector arguments or returns subject to ABI changes required by the target.
This resolves PR33883.
Thanks to Alex Crichton for reporting the issue!
Reviewers: zoran.jovanovic, atanasyan
Differential Revision: https://reviews.llvm.org/D35765
llvm-svn: 309561
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#
8b9bb534 |
| 28-Jul-2017 |
Adrian Prantl <aprantl@apple.com> |
Remove the unused offset from DBG_VALUE (NFC)
Followup to r309426. rdar://problem/33580047
llvm-svn: 309450
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#
a617576b |
| 28-Jul-2017 |
Adrian Prantl <aprantl@apple.com> |
Remove the unused dbg.value offset from SelectionDAG (NFC)
Followup to r309426. rdar://problem/33580047
llvm-svn: 309436
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#
abe04759 |
| 28-Jul-2017 |
Adrian Prantl <aprantl@apple.com> |
Remove the obsolete offset parameter from @llvm.dbg.value
There is no situation where this rarely-used argument cannot be substituted with a DIExpression and removing it allows us to simplify the DW
Remove the obsolete offset parameter from @llvm.dbg.value
There is no situation where this rarely-used argument cannot be substituted with a DIExpression and removing it allows us to simplify the DWARF backend. Note that this patch does not yet remove any of the newly dead code.
rdar://problem/33580047 Differential Revision: https://reviews.llvm.org/D35951
llvm-svn: 309426
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#
081ffe2f |
| 26-Jul-2017 |
Peter Collingbourne <peter@pcc.me.uk> |
Change CallLoweringInfo::CS to be an ImmutableCallSite instead of a pointer. NFCI.
This was a use-after-free waiting to happen.
llvm-svn: 309159
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#
bea2e188 |
| 13-Jul-2017 |
Geoff Berry <gberry@codeaurora.org> |
[TargetLowering] Add hook for adding target MMO flags when doing ISel.
Summary: Add TargetLowering hook getMMOFlags() to add target specific MMO flags to load/store instructions created by ISel.
Re
[TargetLowering] Add hook for adding target MMO flags when doing ISel.
Summary: Add TargetLowering hook getMMOFlags() to add target specific MMO flags to load/store instructions created by ISel.
Reviewers: bogner, hfinkel, qcolombet, MatzeB
Subscribers: mcrosier, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D34962
llvm-svn: 307879
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#
965613ef |
| 12-Jul-2017 |
Daniel Neilson <dneilson@azul.com> |
Add element atomic memset intrinsic
Summary: Continuing the work from https://reviews.llvm.org/D33240, this change introduces an element unordered-atomic memset intrinsic. This intrinsic is essentia
Add element atomic memset intrinsic
Summary: Continuing the work from https://reviews.llvm.org/D33240, this change introduces an element unordered-atomic memset intrinsic. This intrinsic is essentially memset with the implementation requirement that all stores used for the assignment are done with unordered-atomic stores of a given element size.
Reviewers: eli.friedman, reames, mkazantsev, skatkov
Reviewed By: reames
Subscribers: jfb, dschuff, sbc100, jgravelle-google, aheejin, efriedma, llvm-commits
Differential Revision: https://reviews.llvm.org/D34885
llvm-svn: 307854
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#
57226ef3 |
| 12-Jul-2017 |
Daniel Neilson <dneilson@azul.com> |
Add element atomic memmove intrinsic
Summary: Continuing the work from https://reviews.llvm.org/D33240, this change introduces an element unordered-atomic memmove intrinsic. This intrinsic is essent
Add element atomic memmove intrinsic
Summary: Continuing the work from https://reviews.llvm.org/D33240, this change introduces an element unordered-atomic memmove intrinsic. This intrinsic is essentially memmove with the implementation requirement that all loads/stores used for the copy are done with unordered-atomic loads/stores of a given element size.
Reviewers: eli.friedman, reames, mkazantsev, skatkov
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34884
llvm-svn: 307796
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#
bb80d3e1 |
| 11-Jul-2017 |
Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> |
Enhance synchscope representation
OpenCL 2.0 introduces the notion of memory scopes in atomic operations to global and local memory. These scopes restrict how synchronization is achieved, whic
Enhance synchscope representation
OpenCL 2.0 introduces the notion of memory scopes in atomic operations to global and local memory. These scopes restrict how synchronization is achieved, which can result in improved performance.
This change extends existing notion of synchronization scopes in LLVM to support arbitrary scopes expressed as target-specific strings, in addition to the already defined scopes (single thread, system).
The LLVM IR and MIR syntax for expressing synchronization scopes has changed to use *syncscope("<scope>")*, where <scope> can be "singlethread" (this replaces *singlethread* keyword), or a target-specific name. As before, if the scope is not specified, it defaults to CrossThread/System scope.
Implementation details: - Mapping from synchronization scope name/string to synchronization scope id is stored in LLVM context; - CrossThread/System and SingleThread scopes are pre-defined to efficiently check for known scopes without comparing strings; - Synchronization scope names are stored in SYNC_SCOPE_NAMES_BLOCK in the bitcode.
Differential Revision: https://reviews.llvm.org/D21723
llvm-svn: 307722
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#
55a4b670 |
| 09-Jul-2017 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
Handle ConstantExpr correctly in SelectionDAGBuilder
This change fixes a bug in SelectionDAGBuilder::visitInsertValue and SelectionDAGBuilder::visitExtractValue where constant expressions (InsertVal
Handle ConstantExpr correctly in SelectionDAGBuilder
This change fixes a bug in SelectionDAGBuilder::visitInsertValue and SelectionDAGBuilder::visitExtractValue where constant expressions (InsertValueConstantExpr and ExtractValueConstantExpr) would be treated as non-constant instructions (InsertValueInst and ExtractValueInst). This bug resulted in an incorrect memory access, which manifested as an assertion failure in SDValue::SDValue.
Fixes PR#33094.
Submitted on behalf of @Praetonus (Benoit Vey)
Differential Revision: https://reviews.llvm.org/D34538
llvm-svn: 307502
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#
e6f76558 |
| 05-Jul-2017 |
Vadim Chugunov <vadimcn@gmail.com> |
Fix libcall expansion creating DAG nodes with invalid type post type legalization.
If we are lowering a libcall after legalization, we'll split the return type into a pair of legal values.
Patch by
Fix libcall expansion creating DAG nodes with invalid type post type legalization.
If we are lowering a libcall after legalization, we'll split the return type into a pair of legal values.
Patch by Jatin Bhateja and Eli Friedman.
Differential Revision: https://reviews.llvm.org/D34240
llvm-svn: 307207
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#
92a8fe34 |
| 01-Jul-2017 |
Craig Topper <craig.topper@intel.com> |
[SelectionDAGBuilder] Use EVT::getVectorVT instead of MVT::getVectorVT to prevent a crash if the type isn't a simple VT.
llvm-svn: 306950
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#
3faabbbe |
| 16-Jun-2017 |
Daniel Neilson <dneilson@azul.com> |
[Atomics] Rename and change prototype for atomic memcpy intrinsic
Summary:
Background: http://lists.llvm.org/pipermail/llvm-dev/2017-May/112779.html
This change is to alter the prototype for the a
[Atomics] Rename and change prototype for atomic memcpy intrinsic
Summary:
Background: http://lists.llvm.org/pipermail/llvm-dev/2017-May/112779.html
This change is to alter the prototype for the atomic memcpy intrinsic. The prototype itself is being changed to more closely resemble the semantics and parameters of the llvm.memcpy intrinsic -- to ease later combination of the llvm.memcpy and atomic memcpy intrinsics. Furthermore, the name of the atomic memcpy intrinsic is being changed to make it clear that it is not a generic atomic memcpy, but specifically a memcpy is unordered atomic.
Reviewers: reames, sanjoy, efriedma
Reviewed By: reames
Subscribers: mzolotukhin, anna, llvm-commits, skatkov
Differential Revision: https://reviews.llvm.org/D33240
llvm-svn: 305558
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#
00a970a8 |
| 15-Jun-2017 |
Benjamin Kramer <benny.kra@googlemail.com> |
Fold variable into assert.
Silences an unused variable warning in Release builds.
llvm-svn: 305488
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#
ae9312c4 |
| 15-Jun-2017 |
Arnold Schwaighofer <aschwaighofer@apple.com> |
ISel: Fix FastISel of swifterror values
The code assumed that we process instructions in basic block order. FastISel processes instructions in reverse basic block order. We need to pre-assign virtu
ISel: Fix FastISel of swifterror values
The code assumed that we process instructions in basic block order. FastISel processes instructions in reverse basic block order. We need to pre-assign virtual registers before selecting otherwise we get def-use relationships wrong.
This only affects code with swifterror registers.
rdar://32659327
llvm-svn: 305484
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#
212cccb2 |
| 09-Jun-2017 |
Simon Dardis <simon.dardis@imgtec.com> |
Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
By target hookifying getRegisterType, getNumRegisters, getVectorBreakdown, backends can request that LLVM to
Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns"
By target hookifying getRegisterType, getNumRegisters, getVectorBreakdown, backends can request that LLVM to scalarize vector types for calls and returns.
The MIPS vector ABI requires that vector arguments and returns are passed in integer registers. With SelectionDAG's new hooks, the MIPS backend can now handle LLVM-IR with vector types in calls and returns. E.g. 'call @foo(<4 x i32> %4)'.
Previously these cases would be scalarized for the MIPS O32/N32/N64 ABI for calls and returns if vector types were not legal. If vector types were legal, a single 128bit vector argument would be assigned to a single 32 bit / 64 bit integer register.
By teaching the MIPS backend to inspect the original types, it can now implement the MIPS vector ABI which requires a particular method of scalarizing vectors.
Previously, the MIPS backend relied on clang to scalarize types such as "call @foo(<4 x float> %a) into "call @foo(i32 inreg %1, i32 inreg %2, i32 inreg %3, i32 inreg %4)".
This patch enables the MIPS backend to take either form for vector types.
The previous version of this patch had a "conditional move or jump depends on uninitialized value".
Reviewers: zoran.jovanovic, jaydeep, vkalintiris, slthakur
Differential Revision: https://reviews.llvm.org/D27845
llvm-svn: 305083
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#
2726ea2a |
| 06-Jun-2017 |
Sanjay Patel <spatel@rotateright.com> |
[DAG] remove duplicated code for isOnlyUsedInZeroEqualityComparison(); NFCI
llvm-svn: 304822
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#
f466001e |
| 25-May-2017 |
Andrew Kaylor <andrew.kaylor@intel.com> |
Add constrained intrinsics for some libm-equivalent operations
Differential revision: https://reviews.llvm.org/D32319
llvm-svn: 303922
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#
f0621926 |
| 25-May-2017 |
Adrian Prantl <aprantl@apple.com> |
Fix SelectionDAGBuilder::getDbgValue to not expect DW_OP_deref on FI vars
This fixes an oversight in r300522, which changed alloca dbg.values to no longer emit a DW_OP_deref.
The array.ll testcase
Fix SelectionDAGBuilder::getDbgValue to not expect DW_OP_deref on FI vars
This fixes an oversight in r300522, which changed alloca dbg.values to no longer emit a DW_OP_deref.
The array.ll testcase was regenerated from source.
Fixes PR33166: https://bugs.llvm.org/show_bug.cgi?id=33166
llvm-svn: 303897
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#
8c605c0e |
| 23-May-2017 |
Tim Northover <tnorthover@apple.com> |
Revert LLVM changes for "Sema: allow imaginary constants via GNU extension if UDL overloads not present."
The changes accidentally crept into a Clang commit I was making.
llvm-svn: 303697
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#
6b5eceac |
| 23-May-2017 |
Tim Northover <tnorthover@apple.com> |
Sema: allow imaginary constants via GNU extension if UDL overloads not present.
C++14 added user-defined literal support for complex numbers so that you can write something like "complex<double> val
Sema: allow imaginary constants via GNU extension if UDL overloads not present.
C++14 added user-defined literal support for complex numbers so that you can write something like "complex<double> val = 2i". However, there is an existing GNU extension supporting this syntax and interpreting the result as a _Complex type.
This changes parsing so that such literals are interpreted in terms of C++14's operators if an overload is present but otherwise falls back to the original GNU extension.
llvm-svn: 303694
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#
6f0ecca3 |
| 16-May-2017 |
Peter Collingbourne <peter@pcc.me.uk> |
IR: Give function GlobalValue::getRealLinkageName() a less misleading name: dropLLVMManglingEscape().
This function gives the wrong answer on some non-ELF platforms in some cases. The function that
IR: Give function GlobalValue::getRealLinkageName() a less misleading name: dropLLVMManglingEscape().
This function gives the wrong answer on some non-ELF platforms in some cases. The function that does the right thing lives in Mangler.h. To try to discourage people from using this function, give it a different name.
Differential Revision: https://reviews.llvm.org/D33162
llvm-svn: 303134
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#
8df66c60 |
| 12-May-2017 |
Craig Topper <craig.topper@gmail.com> |
[KnownBits] Add bit counting methods to KnownBits struct and use them where possible
This patch adds min/max population count, leading/trailing zero/one bit counting methods.
The min methods return
[KnownBits] Add bit counting methods to KnownBits struct and use them where possible
This patch adds min/max population count, leading/trailing zero/one bit counting methods.
The min methods return answers based on bits that are known without considering unknown bits. The max methods give answers taking into account the largest count that unknown bits could give.
Differential Revision: https://reviews.llvm.org/D32931
llvm-svn: 302925
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