History log of /llvm-project/llvm/lib/CodeGen/MachineRegisterInfo.cpp (Results 101 – 125 of 188)
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Revision tags: llvmorg-3.6.2, llvmorg-3.6.2-rc1, llvmorg-3.6.1, llvmorg-3.6.1-rc1, llvmorg-3.5.2, llvmorg-3.5.2-rc1
# 433c432b 10-Mar-2015 Eric Christopher <echristo@gmail.com>

Have TargetRegisterInfo::getLargestLegalSuperClass take a
MachineFunction argument so that it can look up the subtarget
rather than using a cached one in some Targets.

llvm-svn: 231888


Revision tags: llvmorg-3.6.0, llvmorg-3.6.0-rc4, llvmorg-3.6.0-rc3, llvmorg-3.6.0-rc2
# 349d5886 27-Jan-2015 Eric Christopher <echristo@gmail.com>

MachineRegisterInfo can access TII off of the MachineFunction's
subtarget and so doesn't need the TargetMachine or to access via
getSubtargetImpl. Update all callers.

llvm-svn: 227160


Revision tags: llvmorg-3.6.0-rc1, llvmorg-3.5.1, llvmorg-3.5.1-rc2
# addddc44 15-Dec-2014 Michael Ilseman <milseman@apple.com>

Silence more static analyzer warnings.

Add in definedness checks for shift operators, null checks when
pointers are assumed by the code to be non-null, and explicit
unreachables.

llvm-svn: 224255


# e3d3b88c 10-Dec-2014 Matthias Braun <matze@braunis.de>

Add a flag to enable/disable subregister liveness.

llvm-svn: 223884


# 3f1d8fdd 10-Dec-2014 Matthias Braun <matze@braunis.de>

LiveInterval: Add support to track liveness of subregisters.

This code adds the required data structures. Algorithms to compute it follow.

llvm-svn: 223877


Revision tags: llvmorg-3.5.1-rc1, llvmorg-3.5.0, llvmorg-3.5.0-rc4
# 688fa5e1 25-Aug-2014 Dylan Noblesmith <nobled@dreamwidth.org>

CodeGen: switch raw array to std::vector

llvm-svn: 216355


Revision tags: llvmorg-3.5.0-rc3
# ce40dbcb 12-Aug-2014 Eric Christopher <echristo@gmail.com>

Have MachineRegisterInfo take and store the MachineFunction it
was created for rather than the TargetMachine since we only
needed the TM for the subtarget and we can get that from the
MF.

llvm-svn:

Have MachineRegisterInfo take and store the MachineFunction it
was created for rather than the TargetMachine since we only
needed the TM for the subtarget and we can get that from the
MF.

llvm-svn: 215432

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Revision tags: llvmorg-3.5.0-rc2
# ec7cbd7d 04-Aug-2014 Pedro Artigas <partigas@apple.com>

Changed the liveness tracking in the RegisterScavenger
to use register units instead of registers.

reviewed by Jakob Stoklund Olesen.

llvm-svn: 214798


# d913448b 04-Aug-2014 Eric Christopher <echristo@gmail.com>

Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.

llvm-svn: 214781


Revision tags: llvmorg-3.5.0-rc1, llvmorg-3.4.2, llvmorg-3.4.2-rc1, llvmorg-3.4.1, llvmorg-3.4.1-rc2
# c0196b1b 14-Apr-2014 Craig Topper <craig.topper@gmail.com>

[C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr.

llvm-svn: 206142


Revision tags: llvmorg-3.4.1-rc1
# b36376ef 17-Mar-2014 Owen Anderson <resistor@mac.com>

Switch a number of loops in lib/CodeGen over to range-based for-loops, now that
the MachineRegisterInfo iterators are compatible with it.

llvm-svn: 204075


# 16c6bf49 13-Mar-2014 Owen Anderson <resistor@mac.com>

Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing
operator* on the by-operand iterators to return a MachineOperand& rather than
a MachineInstr&. At this point they almost

Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing
operator* on the by-operand iterators to return a MachineOperand& rather than
a MachineInstr&. At this point they almost behave like normal iterators!

Again, this requires making some existing loops more verbose, but should pave
the way for the big range-based for-loop cleanups in the future.

llvm-svn: 203865

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# 8d62008e 13-Mar-2014 Ekaterina Romanova <katya_romanova@playstation.sony.com>

Fix for http://llvm.org/bugs/show_bug.cgi?id=18590

This patch fixes the bug in peephole optimization that folds a load which defines one vreg into the one and only use of that vreg. With debug info,

Fix for http://llvm.org/bugs/show_bug.cgi?id=18590

This patch fixes the bug in peephole optimization that folds a load which defines one vreg into the one and only use of that vreg. With debug info, a DBG_VALUE that referenced the vreg considered to be a use, preventing the optimization. The fix is to ignore DBG_VALUE's during the optimization, and undef a DBG_VALUE that references a vreg that gets removed.
Patch by Trevor Smigiel!

llvm-svn: 203829

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# b6d0bd48 02-Mar-2014 Benjamin Kramer <benny.kra@googlemail.com>

[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.

Remove the old functions.

llvm-svn: 202636


# 8a8cd2ba 07-Jan-2014 Chandler Carruth <chandlerc@gmail.com>

Re-sort all of the includes with ./utils/sort_includes.py so that
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also com

Re-sort all of the includes with ./utils/sort_includes.py so that
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

llvm-svn: 198685

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# 1fb3362a 02-Jan-2014 Quentin Colombet <qcolombet@apple.com>

[RegAlloc] Make tryInstructionSplit less aggressive.

The greedy register allocator tries to split a live-range around each
instruction where it is used or defined to relax the constraints on the ent

[RegAlloc] Make tryInstructionSplit less aggressive.

The greedy register allocator tries to split a live-range around each
instruction where it is used or defined to relax the constraints on the entire
live-range (this is a last chance split before falling back to spill).
The goal is to have a big live-range that is unconstrained (i.e., that can use
the largest legal register class) and several small local live-range that carry
the constraints implied by each instruction.
E.g.,
Let csti be the constraints on operation i.

V1=
op1 V1(cst1)
op2 V1(cst2)

V1 live-range is constrained on the intersection of cst1 and cst2.

tryInstructionSplit relaxes those constraints by aggressively splitting each
def/use point:
V1=
V2 = V1
V3 = V2
op1 V3(cst1)
V4 = V2
op2 V4(cst2)

Because of how the coalescer infrastructure works, each new variable (V3, V4)
that is alive at the same time as V1 (or its copy, here V2) interfere with V1.
Thus, we end up with an uncoalescable copy for each split point.

To make tryInstructionSplit less aggressive, we check if the split point
actually relaxes the constraints on the whole live-range. If it does not, we do
not insert it.
Indeed, it will not help the global allocation problem:
- V1 will have the same constraints.
- V1 will have the same interference + possibly the newly added split variable
VS.
- VS will produce an uncoalesceable copy if alive at the same time as V1.

<rdar://problem/15570057>

llvm-svn: 198369

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Revision tags: llvmorg-3.4.0, llvmorg-3.4.0-rc3, llvmorg-3.4.0-rc2, llvmorg-3.4.0-rc1
# d12ccbd3 19-Nov-2013 Juergen Ributzka <juergen@apple.com>

[weak vtables] Remove a bunch of weak vtables

This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed.

[weak vtables] Remove a bunch of weak vtables

This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 195064

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# 49109a27 18-Nov-2013 Alexey Samsonov <samsonov@google.com>

Revert r194865 and r194874.

This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
Base *foo = new Child();
delete foo;
will not

Revert r194865 and r194874.

This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
Base *foo = new Child();
delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.

llvm-svn: 194997

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# dbedae89 15-Nov-2013 Juergen Ributzka <juergen@apple.com>

[weak vtables] Remove a bunch of weak vtables

This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.

Differential Revision: http://llvm-reviews.chandl

[weak vtables] Remove a bunch of weak vtables

This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 194865

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# f367cd92 14-Aug-2013 Mark Lacey <mark.lacey@apple.com>

Notify LiveRangeEdit of new virtual registers.

Add a delegate class to MachineRegisterInfo with a single virtual
function, MRI_NoteNewVirtualRegister(). Update LiveRangeEdit to inherit
from this del

Notify LiveRangeEdit of new virtual registers.

Add a delegate class to MachineRegisterInfo with a single virtual
function, MRI_NoteNewVirtualRegister(). Update LiveRangeEdit to inherit
from this delegate class and override the definition of the callback
with an implementation that tracks the newly created virtual registers.

llvm-svn: 188435

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Revision tags: llvmorg-3.3.1-rc1
# 626c991c 17-Jun-2013 Bill Wendling <isanbard@gmail.com>

Directly access objects which may change during compilation.

llvm-svn: 184121


Revision tags: llvmorg-3.3.0, llvmorg-3.3.0-rc3, llvmorg-3.3.0-rc2, llvmorg-3.3.0-rc1
# e17c3fde 19-Apr-2013 Jakob Stoklund Olesen <stoklund@2pi.dk>

Add an MRI::verifyUseLists() function.

This checks the sanity of the register use lists in the MI intermediate
representation.

llvm-svn: 179895


# c1b566db 13-Mar-2013 Jakob Stoklund Olesen <stoklund@2pi.dk>

Check register classes also when changing them.

We have the same assertion in createVirtualRegister.

llvm-svn: 176959


# 4acf7dd8 05-Feb-2013 Jakob Stoklund Olesen <stoklund@2pi.dk>

Remove liveout lists from MachineRegisterInfo.

All targets are now adding return value registers as implicit uses on
return instructions, and there is no longer a need for the live out
lists.

llvm-

Remove liveout lists from MachineRegisterInfo.

All targets are now adding return value registers as implicit uses on
return instructions, and there is no longer a need for the live out
lists.

llvm-svn: 174417

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# dc5285f1 05-Jan-2013 Jakob Stoklund Olesen <stoklund@2pi.dk>

Don't call destructors on MachineInstr and MachineOperand.

The series of patches leading up to this one makes llc -O0 run 8% faster.

When deallocating a MachineFunction, there is no need to visit a

Don't call destructors on MachineInstr and MachineOperand.

The series of patches leading up to this one makes llc -O0 run 8% faster.

When deallocating a MachineFunction, there is no need to visit all
MachineInstr and MachineOperand objects to deallocate them. All their
memory come from a BumpPtrAllocator that is about to be purged, and they
have empty destructors anyway.

This only applies when deallocating the MachineFunction.
DeleteMachineInstr() should still be used to recycle MI memory during
the codegen passes.

Remove the LeakDetector support for MachineInstr. I've never seen it
used before, and now it definitely doesn't work. With this patch, leaked
MachineInstrs would be much less of a problem since all of their memory
will be reclaimed by ~MachineFunction().

llvm-svn: 171599

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