Add "const" in GetUnderlyingObjects. NFC

Summary:
Both the input Value pointer and the returned Value
pointers in GetUnderlyingObjects are now declared as
const.

It turned out that all current (in-

Add "const" in GetUnderlyingObjects. NFC

Summary:
Both the input Value pointer and the returned Value
pointers in GetUnderlyingObjects are now declared as
const.

It turned out that all current (in-tree) uses of
GetUnderlyingObjects were trivial to update, being
satisfied with have those Value pointers declared
as const. Actually, in the past several of the users
had to use const_cast, just because of ValueTracking
not providing a version of GetUnderlyingObjects with
"const" Value pointers. With this patch we get rid
of those const casts.

Reviewers: hfinkel, materi, jkorous

Reviewed By: jkorous

Subscribers: dexonsmith, jkorous, jholewinski, sdardis, eraman, hiraditya, jrtc27, atanasyan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61038

llvm-svn: 359072

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Use llvm::stable_sort

While touching the code, simplify if feasible.

llvm-svn: 358996

[CodeGen] Add "const" to MachineInstr::mayAlias

Summary:
The basic idea here is to make it possible to use
MachineInstr::mayAlias also when the MachineInstr
is const (or the "Other" MachineInstr is

[CodeGen] Add "const" to MachineInstr::mayAlias

Summary:
The basic idea here is to make it possible to use
MachineInstr::mayAlias also when the MachineInstr
is const (or the "Other" MachineInstr is const).

The addition of const in MachineInstr::mayAlias
then rippled down to the need for adding const
in several other places, such as
TargetTransformInfo::getMemOperandWithOffset.

Reviewers: hfinkel

Reviewed By: hfinkel

Subscribers: hfinkel, MatzeB, arsenm, jvesely, nhaehnle, hiraditya, javed.absar, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60856

llvm-svn: 358744

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[Pipeliner] Fix incorrect loop carried dependence calculation

The isLoopCarriedDep function does not correctly compute loop
carried dependences when the array index offset is negative
or the stride

[Pipeliner] Fix incorrect loop carried dependence calculation

The isLoopCarriedDep function does not correctly compute loop
carried dependences when the array index offset is negative
or the stride is smallar than the access size.

Patch by Denis Antrushin.

Differential Revision: https://reviews.llvm.org/D60135

llvm-svn: 358233

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[CodeGen] Be as conservative about atomic accesses as for volatile

Background: At the moment, we record the AtomicOrdering of an access in the MMO, but also mark any atomic access as volatile in Sel

[CodeGen] Be as conservative about atomic accesses as for volatile

Background: At the moment, we record the AtomicOrdering of an access in the MMO, but also mark any atomic access as volatile in SelectionDAG. I'm working towards separating that. See https://reviews.llvm.org/D57601 for context.

Update all usages of isVolatile in lib/CodeGen to preserve behaviour once atomic MMOs stop being also volatile. This is NFC in it's current form, but is essential for correctness once we make that final change.

It useful to keep in mind that AtomicSDNode is not a parent of LoadSDNode, StoreSDNode, or LSBaseSDNode. As a result, any call to isVolatile on one of those static types doesn't need a companion isAtomic check. We should probably adjust that class hierarchy long term, but for now, that seperation is useful.

I'm deliberately being conservative about handling. I want the change to stop adding volatile to be NFC itself, and then will work through places where we can be less conservative for atomics one by one in separate changes w/tests.

Differential Revision: https://reviews.llvm.org/D57596

llvm-svn: 352937

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[NFC] Test commit : fix typo.

llvm-svn: 352248

[Pipeliner] Add two pragmas to control software pipelining optimization

#pragma clang loop pipeline(disable)

Disable SWP optimization for the next loop.
“disable” is the only possible val

[Pipeliner] Add two pragmas to control software pipelining optimization

#pragma clang loop pipeline(disable)

Disable SWP optimization for the next loop.
“disable” is the only possible value.

#pragma clang loop pipeline_initiation_interval(number)

Set value of initiation interval for SWP
optimization to specified number value for
the next loop. Number is the positive value
greater than 0.

These pragmas could be used for debugging or reducing
compile time purposes. It is possible to disable SWP for
concrete loops to save compilation time or to find bugs
by not doing SWP to certain loops. It is possible to set
value of initiation interval to concrete number to save
compilation time by not doing extra pipeliner passes or
to check created schedule for specific initiation interval.

That is llvm part of the fix

Clang part of fix: https://reviews.llvm.org/D55710

Patch by Alexey Lapshin!

Differential Revision: https://reviews.llvm.org/D56403

llvm-svn: 351923

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Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the ne

Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636

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Reapply r345008 "Split MachinePipeliner code into header and cpp files"

Split MachinePipeliner code into header and cpp files to allow
inheritance from SwingSchedulerDAG.

This reapplies https://rev

Reapply r345008 "Split MachinePipeliner code into header and cpp files"

Split MachinePipeliner code into header and cpp files to allow
inheritance from SwingSchedulerDAG.

This reapplies https://reviews.llvm.org/D56084 after moving the
implementation of the dump functions into the .cpp files. This fixes a
linker error when building with Clang modules enables and local
submodule visibility disabled.

Original patch by Lama Saba <lama.saba@intel.com>!

llvm-svn: 351077

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[NFC] fix trivial typos in comments

llvm-svn: 350690

Revert "Revert "Revert "Resubmit rL345008 "Split MachinePipeliner code into header and cpp files""""

This reverts commit D56084.

llvm-svn: 350654

Revert "Revert "Resubmit rL345008 "Split MachinePipeliner code into header and cpp files"""

This reverts commit rL350497
reported remaining issues seem to be unrelated to modules or this change.
mor

Revert "Revert "Resubmit rL345008 "Split MachinePipeliner code into header and cpp files"""

This reverts commit rL350497
reported remaining issues seem to be unrelated to modules or this change.
more info: https://reviews.llvm.org/D56084

llvm-svn: 350621

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Revert "Resubmit rL345008 "Split MachinePipeliner code into header and cpp files""

This reverts commit rL350493
issues related to modules still appear in http://green.lab.llvm.org/green/job/lldb-cm

Revert "Resubmit rL345008 "Split MachinePipeliner code into header and cpp files""

This reverts commit rL350493
issues related to modules still appear in http://green.lab.llvm.org/green/job/lldb-cmake

llvm-svn: 350497

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Resubmit rL345008 "Split MachinePipeliner code into header and cpp files"

Resubmitted in rL345290 and reverted in rL350345 due to failures in
http://green.lab.llvm.org/green/job/lldb-cmake/
Resubmit

Resubmit rL345008 "Split MachinePipeliner code into header and cpp files"

Resubmitted in rL345290 and reverted in rL350345 due to failures in
http://green.lab.llvm.org/green/job/lldb-cmake/
Resubmitting after a workaround to lldb-cmake failure was
committed in rL350346, more info in https://reviews.llvm.org/D56084

llvm-svn: 350493

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Revert "Resubmit rL345008 "Split MachinePipeliner code into header and cpp files""

This reverts commit r350290.

llvm-svn: 350345

Resubmit rL345008 "Split MachinePipeliner code into header and cpp files"

The commit caused unclear failures in http://green.lab.llvm.org/green//job/lldb-cmake/
will revert if the error reappears

D

Resubmit rL345008 "Split MachinePipeliner code into header and cpp files"

The commit caused unclear failures in http://green.lab.llvm.org/green//job/lldb-cmake/
will revert if the error reappears

Differential Revision: https://reviews.llvm.org/D56084

llvm-svn: 350290

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[CodeGen][NFC] Make `TII::getMemOpBaseImmOfs` return a base operand

Currently, instructions doing memory accesses through a base operand that is
not a register can not be analyzed using `TII::getMem

[CodeGen][NFC] Make `TII::getMemOpBaseImmOfs` return a base operand

Currently, instructions doing memory accesses through a base operand that is
not a register can not be analyzed using `TII::getMemOpBaseRegImmOfs`.

This means that functions such as `TII::shouldClusterMemOps` will bail
out on instructions using an FI as a base instead of a register.

The goal of this patch is to refactor all this to return a base
operand instead of a base register.

Then in a separate patch, I will add FI support to the mem op clustering
in the MachineScheduler.

Differential Revision: https://reviews.llvm.org/D54846

llvm-svn: 347746

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[Pipeliner] Ignore Artificial dependences while computing recurrences.

The artificial dependencies are not real dependencies. In some cases, they
form circuits with bigger MII. However, they are use

[Pipeliner] Ignore Artificial dependences while computing recurrences.

The artificial dependencies are not real dependencies. In some cases, they
form circuits with bigger MII. However, they are used to schedule instructions
better.

Differential Revision: https://reviews.llvm.org/D53450

llvm-svn: 345319

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[Pipeliner] Remove the unneeded include header(NFC).

Differential Revision: https://reviews.llvm.org/D53451

llvm-svn: 345318

Revert "[MachinePipeliner] Split MachinePipeliner code into header and cpp files"

This reverts commit 40760b733d9eef841c897338af5e9d81b12551bf.
It seems that the commit is a cuse of the build failur

Revert "[MachinePipeliner] Split MachinePipeliner code into header and cpp files"

This reverts commit 40760b733d9eef841c897338af5e9d81b12551bf.
It seems that the commit is a cuse of the build failure.

llvm-svn: 345032

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[MachinePipeliner] Split MachinePipeliner code into header and cpp files

Split MachinePipeliner code into header and cpp files to allow inheritance from SwingSchedulerDAG

Differential Revision: htt

[MachinePipeliner] Split MachinePipeliner code into header and cpp files

Split MachinePipeliner code into header and cpp files to allow inheritance from SwingSchedulerDAG

Differential Revision: https://reviews.llvm.org/D53477

llvm-svn: 345008

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[Pipeliner] copyToPhi DAG Mutation to improve scheduling.

In a loop, create artificial dependences between the source of a
COPY/REG_SEQUENCE to the use in next iteration.

Eg:
SRC ----Data Dep--> CO

[Pipeliner] copyToPhi DAG Mutation to improve scheduling.

In a loop, create artificial dependences between the source of a
COPY/REG_SEQUENCE to the use in next iteration.

Eg:
SRC ----Data Dep--> COPY
COPY ---Anti Dep--> PHI (implies, to be used in next iteration)
PHI ----Data Dep--> USE

This patches creates
USE ----Artificial Dep---> SRC

This will effectively schedule the COPY late to eliminate additional copies.
Before this patch, the schedule can be
SRC, COPY, USE : The COPY is used in next iteration and it needs to be
preserved.

After this patch, the schedule can be
USE, SRC, COPY : The COPY is used in next iteration and the live interval is
reduced.

Differential Revision: https://reviews.llvm.org/D53303

llvm-svn: 344748

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[Pipeliner] Use the Index from Topo instead of relying on NodeNum. (NFC)

In future, if we may add any new DAG mutations other than artificial dependencies,
the NodeNum may not be valid. Instead the

[Pipeliner] Use the Index from Topo instead of relying on NodeNum. (NFC)

In future, if we may add any new DAG mutations other than artificial dependencies,
the NodeNum may not be valid. Instead the index from topological schedule DAG can be
used as long as we update it with the DAG change.

Differential Revision: https://reviews.llvm.org/D53104

llvm-svn: 344283

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[Pipeliner] Fix the Schedule DAG topoligical order.

This patch updates the DAG change to reflect in the topological ordering
of the nodes.

Differential Revision: https://reviews.llvm.org/D53105

ll

[Pipeliner] Fix the Schedule DAG topoligical order.

This patch updates the DAG change to reflect in the topological ordering
of the nodes.

Differential Revision: https://reviews.llvm.org/D53105

llvm-svn: 344282

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Replace most users of UnknownSize with LocationSize::unknown(); NFC

Moving away from UnknownSize is part of the effort to migrate us to
LocationSizes (e.g. the cleanup promised in D44748).

This doe

Replace most users of UnknownSize with LocationSize::unknown(); NFC

Moving away from UnknownSize is part of the effort to migrate us to
LocationSizes (e.g. the cleanup promised in D44748).

This doesn't entirely remove all of the uses of UnknownSize; some uses
require tweaks to assume that UnknownSize isn't just some kind of int.
This patch is intended to just be a trivial replacement for all places
where LocationSize::unknown() will Just Work.

llvm-svn: 344186

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