Uncomment assertions that register# != 0 on calls to
MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes
to relevant files.

llvm-svn: 11882

Fix an iterator invalidation problem. :(

llvm-svn: 11627

Add method to update livevar when an instruction moves

llvm-svn: 11625

Make dense maps keyed on physical registers smallerusing
MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.

Also use MRegisterInfo::is{Physical,Virtual}Register where
approp

Make dense maps keyed on physical registers smallerusing
MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.

Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.

llvm-svn: 11477

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Change MachineBasicBlock's vector of MachineInstr pointers into an
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
Machi

Change MachineBasicBlock's vector of MachineInstr pointers into an
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.

llvm-svn: 11340

show more ...

Add #include

llvm-svn: 11285

Do not use MachineOperand::isVirtualRegister either!

llvm-svn: 11283

Eliminate users of MachineOperand::isPhysicalRegister

llvm-svn: 11278

Ugh, perform an optimization that GCC should be able to do itself. This
speeds up livevar from .48/.32s -> .45/.31s in LLC on perlbmk

llvm-svn: 11217

Only do stuff for the REAL number of physical registers we have, not 1024.
This speeds up live variables a lot, from .60/.39s -> .47/.26s in LLC, for
the first/second pass respectively.

llvm-svn: 11

Only do stuff for the REAL number of physical registers we have, not 1024.
This speeds up live variables a lot, from .60/.39s -> .47/.26s in LLC, for
the first/second pass respectively.

llvm-svn: 11216

show more ...

Finegrainify namespacification, use new MRegisterInfo::isVirtualRegister
method

llvm-svn: 11037

Finegrainify namespacification
Implement LiveVariables::getIndexMachineBasicBlock

llvm-svn: 11018

Remove unneeded check (with the recent change in live variables a use
of a physical register is always dominated by a def).

llvm-svn: 10821

Correctly compute live variable information for physical registers
when an implicitely defined register is later used by an alias. For example:

call foo
%reg1024 = mov %AL

The cal

Correctly compute live variable information for physical registers
when an implicitely defined register is later used by an alias. For example:

call foo
%reg1024 = mov %AL

The call implicitely defines EAX but only AL is used. Before this fix
no information was available on AL. Now EAX and all its aliases except
AL get defined and die at the call instruction whereas AL lives to be
killed by the assignment.

llvm-svn: 10813

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Change interface of MachineOperand as follows:

a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
b) add isUse(), isDef()
c) rename opHiBits32() to isHiBits32(),
opLoBits3

Change interface of MachineOperand as follows:

a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
b) add isUse(), isDef()
c) rename opHiBits32() to isHiBits32(),
opLoBits32() to isLoBits32(),
opHiBits64() to isHiBits64(),
opLoBits64() to isLoBits64().

This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.

llvm-svn: 10461

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Remove unecessary if statements when looping on ImplicitDefs.

llvm-svn: 10444

Put all LLVM code into the llvm namespace, as per bug 109.

llvm-svn: 9903

Added LLVM project notice to the top of every C++ source file.
Header files will be on the way.

llvm-svn: 9298

Change MRegisterDesc::AliasSet, TargetInstrDescriptor::ImplicitDefs
and TargetInstrDescriptor::ImplicitUses to always point to a null
terminated array and never be null. So there is no need to check

Change MRegisterDesc::AliasSet, TargetInstrDescriptor::ImplicitDefs
and TargetInstrDescriptor::ImplicitUses to always point to a null
terminated array and never be null. So there is no need to check for
pointer validity when iterating over those sets. Code that looked
like:

if (const unsigned* AS = TID.ImplicitDefs) {
for (int i = 0; AS[i]; ++i) {
// use AS[i]
}
}

was changed to:

for (const unsigned* AS = TID.ImplicitDefs; *AS; ++AS) {
// use *AS
}

llvm-svn: 8960

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(1) Added special register class containing (for now) %fsr.
Fixed spilling of %fcc[0-3] which are part of %fsr.

(2) Moved some machine-independent reg-class code to class TargetRegInfo
from

(1) Added special register class containing (for now) %fsr.
Fixed spilling of %fcc[0-3] which are part of %fsr.

(2) Moved some machine-independent reg-class code to class TargetRegInfo
from SparcReg{Class,}Info.

(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
and related functions and flags. Fixed several bugs where only
"isDef" was being checked, not "isDefAndUse".

llvm-svn: 6341

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* Keep the BBMap around as long as the pass is live
* Change getVarInfo to take real virtual register numbers and offset them
itself. This has caused me so much grief, it's not even funny.

llvm-s

* Keep the BBMap around as long as the pass is live
* Change getVarInfo to take real virtual register numbers and offset them
itself. This has caused me so much grief, it's not even funny.

llvm-svn: 6115

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Add a vector to keep track of which registers are allocatable. Remove FIXMEs

llvm-svn: 6015

Re-add gross hack, it's still necessary. :(

llvm-svn: 6012

Remove hideously nasty hack

llvm-svn: 6011

Minor cleanup

llvm-svn: 5976