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Searched refs:zeroing (Results 1 – 25 of 135) sorted by relevance

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/netbsd-src/external/gpl3/gdb/dist/sim/testsuite/arm/iwmmxt/
H A Dwmac.cgs17 # Test Unsigned, Multiply Accumulate, Non-zeroing
69 # Test Signed, Multiply Accumulate, Non-zeroing
H A Dwsad.cgs43 # Test Byte wide absolute accumulation with zeroing
95 # Test Halfword wide absolute accumulation with zeroing
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64.td112 // implemented this should tell the compiler to use the zeroing pseudos to
123 : SubtargetFeature<"use-experimental-zeroing-pseudos",
148 … "Has zero-cycle zeroing instructions for generic registers">;
151 "Has no zero-cycle zeroing instructions for FP registers">;
154 "Has zero-cycle zeroing instructions",
161 "The zero-cycle floating-point zeroing instruction has a bug">;
/netbsd-src/sys/nfs/
H A Dnfs_serv.c862 int ioflags, aftat_ret = 1, retlen, zeroing, adjust; in nfsrv_write() local
897 zeroing = 1; in nfsrv_write()
901 zeroing = 0; in nfsrv_write()
907 if (zeroing) in nfsrv_write()
913 zeroing = 1; in nfsrv_write()
1077 int ioflags, aftat_ret = 1, adjust, v3, zeroing; in nfsrv_writegather() local
1122 zeroing = 1; in nfsrv_writegather()
1127 zeroing = 0; in nfsrv_writegather()
1133 if (zeroing) in nfsrv_writegather()
1139 zeroing = 1; in nfsrv_writegather()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoM.td103 // zeroing the upper 32 bits.
/netbsd-src/external/gpl3/binutils.old/dist/ld/scripttempl/
H A Dv850.sc172 value of '_edata' and zeroing until it reaches '_end'. */
H A Dv850_rh850.sc191 value of '_edata' and zeroing until it reaches '_end'. */
/netbsd-src/external/gpl3/binutils/dist/ld/scripttempl/
H A Dv850_rh850.sc191 value of '_edata' and zeroing until it reaches '_end'. */
H A Dv850.sc172 value of '_edata' and zeroing until it reaches '_end'. */
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DREADME.txt105 WebAssembly registers are implicitly initialized to zero. Explicit zeroing is
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86InstrVecCompiler.td176 // zeroing.
250 // If the bits are not zero we have to fall back to explicitly zeroing by
/netbsd-src/external/lgpl3/gmp/dist/mpn/x86_64/core2/
H A Dsqr_basecase.asm90 C * Consider expanding feed-in code in order to avoid zeroing registers.
94 C * Try zeroing with xor in m2 loops.
/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A Di386-dis.c225 bool zeroing; member
8816 || ins->vex.zeroing != 0 in get_valid_dis386()
9137 ins->vex.zeroing = *ins->codep & 0x80; in get_valid_dis386()
9164 || ins->vex.zeroing != 0)) in get_valid_dis386()
9620 if (ins.vex.zeroing) in print_insn()
9623 else if (ins.vex.zeroing) in print_insn()
9632 if (ins.vex.zeroing && dp->op[0].bytemode == mask_mode) in print_insn()
9640 || ins.vex.zeroing)) in print_insn()
11651 if (ins->vex.zeroing) in OP_E_memory()
H A DChangeLog-2011614 * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
/netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/sh/
H A Dcrt1.S61 ! before zeroing the bss ...
/netbsd-src/external/gpl3/gcc/dist/libgcc/config/sh/
H A Dcrt1.S61 ! before zeroing the bss ...
/netbsd-src/games/larn/
H A DFixed.Bugs83 the scoreboard). If you want to prevent players from zeroing the
/netbsd-src/external/gpl3/binutils.old/dist/gas/config/
H A Dtc-i386.c349 unsigned int zeroing; member
3867 if (i.mask.reg && i.mask.zeroing) in build_evex_prefix()
4331 || ((!i.mask.reg || i.mask.zeroing) in optimize_encoding()
6214 if (i.mask.zeroing) in check_VecOperands()
6223 if (i.mask.zeroing && i.mem_operands) in check_VecOperands()
10658 i.mask.zeroing = 1; in check_VecOperations()
10663 if (i.mask.zeroing) in check_VecOperations()
10670 i.mask.zeroing = 1; in check_VecOperations()
10710 if (i.mask.reg && i.mask.zeroing && !i.mask.reg->reg_num) in check_VecOperations()
/netbsd-src/external/gpl3/binutils/dist/gas/config/
H A Dtc-i386.c376 unsigned int zeroing; member
4118 if (i.mask.reg && i.mask.zeroing) in build_evex_prefix()
4752 || ((!i.mask.reg || i.mask.zeroing) in optimize_encoding()
8115 if (i.mask.zeroing in check_VecOperands()
13485 i.mask.zeroing = 1; in check_VecOperations()
13490 if (i.mask.zeroing) in check_VecOperations()
13497 i.mask.zeroing = 1; in check_VecOperations()
13537 if (i.mask.reg && i.mask.zeroing && !i.mask.reg->reg_num) in check_VecOperations()
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/
H A Di386-dis.c219 bool zeroing; member
9180 ins->vex.zeroing = *ins->codep & 0x80; in get_valid_dis386()
9619 if (ins.vex.zeroing) in print_insn()
9627 || ins.vex.zeroing)) in print_insn()
9698 if (ins.vex.zeroing && ins.vex.mask_register_specifier == 0) in print_insn()
H A DChangeLog-2011614 * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
/netbsd-src/external/gpl3/gdb/dist/opcodes/
H A DChangeLog-2011614 * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
/netbsd-src/external/gpl3/gdb.old/dist/opcodes/
H A DChangeLog-2011614 * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPU.td691 "Enable zeroing of result registers for sparse texture fetches"
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARM.td206 "Has zero-cycle zeroing instructions">;

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