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Searched refs:uncore (Results 1 – 25 of 73) sorted by relevance

123

/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/
H A Dintel_uncore.c107 return bus_space_read_4(d->uncore->regs_bst, d->uncore->regs_bsh, in fw_ack()
113 bus_space_write_4(d->uncore->regs_bst, d->uncore->regs_bsh, d->reg_set, in fw_set()
119 bus_space_write_4(d->uncore->regs_bst, d->uncore->regs_bsh, d->reg_set, in fw_clear()
143 GEM_BUG_ON(d->uncore->fw_domains_timer & d->mask); in fw_domain_arm_timer()
144 d->uncore->fw_domains_timer |= d->mask; in fw_domain_arm_timer()
279 fw_domains_get(struct intel_uncore *uncore, enum forcewake_domains fw_domains) in fw_domains_get() argument
284 GEM_BUG_ON(fw_domains & ~uncore->fw_domains); in fw_domains_get()
286 for_each_fw_domain_masked(d, fw_domains, uncore, tmp) { in fw_domains_get()
291 for_each_fw_domain_masked(d, fw_domains, uncore, tmp) in fw_domains_get()
294 uncore->fw_domains_active |= fw_domains; in fw_domains_get()
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H A Dintel_uncore.h77 void (*force_wake_get)(struct intel_uncore *uncore,
79 void (*force_wake_put)(struct intel_uncore *uncore,
82 enum forcewake_domains (*read_fw_domains)(struct intel_uncore *uncore,
84 enum forcewake_domains (*write_fw_domains)(struct intel_uncore *uncore,
87 u8 (*mmio_readb)(struct intel_uncore *uncore,
89 u16 (*mmio_readw)(struct intel_uncore *uncore,
91 u32 (*mmio_readl)(struct intel_uncore *uncore,
93 u64 (*mmio_readq)(struct intel_uncore *uncore,
96 void (*mmio_writeb)(struct intel_uncore *uncore,
98 void (*mmio_writew)(struct intel_uncore *uncore,
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H A Di915_gem_fence_reg.c75 return fence->ggtt->vm.gt->uncore; in fence_to_uncore()
114 struct intel_uncore *uncore = fence_to_uncore(fence); in i965_write_fence_reg() local
126 intel_uncore_write_fw(uncore, fence_reg_lo, 0); in i965_write_fence_reg()
127 intel_uncore_posting_read_fw(uncore, fence_reg_lo); in i965_write_fence_reg()
129 intel_uncore_write_fw(uncore, fence_reg_hi, upper_32_bits(val)); in i965_write_fence_reg()
130 intel_uncore_write_fw(uncore, fence_reg_lo, lower_32_bits(val)); in i965_write_fence_reg()
131 intel_uncore_posting_read_fw(uncore, fence_reg_lo); in i965_write_fence_reg()
167 struct intel_uncore *uncore = fence_to_uncore(fence); in i915_write_fence_reg() local
170 intel_uncore_write_fw(uncore, reg, val); in i915_write_fence_reg()
171 intel_uncore_posting_read_fw(uncore, reg); in i915_write_fence_reg()
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H A Di915_irq.c177 void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr, in gen3_irq_reset() argument
180 intel_uncore_write(uncore, imr, 0xffffffff); in gen3_irq_reset()
181 intel_uncore_posting_read(uncore, imr); in gen3_irq_reset()
183 intel_uncore_write(uncore, ier, 0); in gen3_irq_reset()
186 intel_uncore_write(uncore, iir, 0xffffffff); in gen3_irq_reset()
187 intel_uncore_posting_read(uncore, iir); in gen3_irq_reset()
188 intel_uncore_write(uncore, iir, 0xffffffff); in gen3_irq_reset()
189 intel_uncore_posting_read(uncore, iir); in gen3_irq_reset()
192 void gen2_irq_reset(struct intel_uncore *uncore) in gen2_irq_reset() argument
194 intel_uncore_write16(uncore, GEN2_IMR, 0xffff); in gen2_irq_reset()
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H A Dintel_sideband.c101 struct intel_uncore *uncore = &i915->uncore; in vlv_sideband_rw() local
110 if (intel_wait_for_register(uncore, in vlv_sideband_rw()
120 intel_uncore_write_fw(uncore, VLV_IOSF_ADDR, addr); in vlv_sideband_rw()
121 intel_uncore_write_fw(uncore, VLV_IOSF_DATA, is_read ? 0 : *val); in vlv_sideband_rw()
122 intel_uncore_write_fw(uncore, VLV_IOSF_DOORBELL_REQ, in vlv_sideband_rw()
130 if (__intel_wait_for_register_fw(uncore, in vlv_sideband_rw()
134 *val = intel_uncore_read_fw(uncore, VLV_IOSF_DATA); in vlv_sideband_rw()
283 struct intel_uncore *uncore = &i915->uncore; in intel_sbi_rw() local
288 if (intel_wait_for_register_fw(uncore, in intel_sbi_rw()
296 intel_uncore_write_fw(uncore, SBI_ADDR, (u32)reg << 16); in intel_sbi_rw()
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H A Di915_irq.h125 void gen2_irq_reset(struct intel_uncore *uncore);
126 void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr,
129 void gen2_irq_init(struct intel_uncore *uncore,
131 void gen3_irq_init(struct intel_uncore *uncore,
136 #define GEN8_IRQ_RESET_NDX(uncore, type, which) \ argument
139 gen3_irq_reset((uncore), GEN8_##type##_IMR(which_), \
143 #define GEN3_IRQ_RESET(uncore, type) \ argument
144 gen3_irq_reset((uncore), type##IMR, type##IIR, type##IER)
146 #define GEN2_IRQ_RESET(uncore) \ argument
147 gen2_irq_reset(uncore)
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H A Di915_perf.c446 struct intel_uncore *uncore = stream->uncore; in gen12_oa_hw_tail_read() local
448 return intel_uncore_read(uncore, GEN12_OAG_OATAILPTR) & in gen12_oa_hw_tail_read()
454 struct intel_uncore *uncore = stream->uncore; in gen8_oa_hw_tail_read() local
456 return intel_uncore_read(uncore, GEN8_OATAILPTR) & GEN8_OATAILPTR_MASK; in gen8_oa_hw_tail_read()
461 struct intel_uncore *uncore = stream->uncore; in gen7_oa_hw_tail_read() local
462 u32 oastatus1 = intel_uncore_read(uncore, GEN7_OASTATUS1); in gen7_oa_hw_tail_read()
726 struct intel_uncore *uncore = stream->uncore; in gen8_append_oa_reports() local
917 intel_uncore_write(uncore, oaheadptr, in gen8_append_oa_reports()
959 struct intel_uncore *uncore = stream->uncore; in gen8_oa_read() local
970 oastatus = intel_uncore_read(uncore, oastatus_reg); in gen8_oa_read()
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H A Di915_gpu_error.c1092 struct intel_uncore *uncore = gt->_gt->uncore; in gt_record_fences() local
1095 if (INTEL_GEN(uncore->i915) >= 6) { in gt_record_fences()
1098 intel_uncore_read64(uncore, in gt_record_fences()
1100 } else if (INTEL_GEN(uncore->i915) >= 4) { in gt_record_fences()
1103 intel_uncore_read64(uncore, in gt_record_fences()
1108 intel_uncore_read(uncore, FENCE_REG(i)); in gt_record_fences()
1122 ee->fault_reg = intel_uncore_read(engine->uncore, in engine_record_registers()
1125 ee->fault_reg = intel_uncore_read(engine->uncore, in engine_record_registers()
1188 ee->hws = intel_uncore_read(engine->uncore, mmio); in engine_record_registers()
1209 intel_uncore_read(engine->uncore, in engine_record_registers()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gt/
H A Dintel_rc6.c48 return rc6_to_gt(rc)->uncore; in rc6_to_uncore()
56 static inline void set(struct intel_uncore *uncore, i915_reg_t reg, u32 val) in set() argument
58 intel_uncore_write_fw(uncore, reg, val); in set()
63 struct intel_uncore *uncore = rc6_to_uncore(rc6); in gen11_rc6_enable() local
68 set(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16 | 85); in gen11_rc6_enable()
69 set(uncore, GEN10_MEDIA_WAKE_RATE_LIMIT, 150); in gen11_rc6_enable()
71 set(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */ in gen11_rc6_enable()
72 set(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */ in gen11_rc6_enable()
74 set(uncore, RING_MAX_IDLE(engine->mmio_base), 10); in gen11_rc6_enable()
76 set(uncore, GUC_MAX_IDLE_COUNT, 0xA); in gen11_rc6_enable()
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H A Dintel_gt_irq.c53 raw_reg_write(gt->uncore, GEN11_IIR_REG_SELECTOR(bank), BIT(bit)); in gen11_gt_engine_identity()
61 ident = raw_reg_read(gt->uncore, GEN11_INTR_IDENTITY_REG(bank)); in gen11_gt_engine_identity()
71 raw_reg_write(gt->uncore, GEN11_INTR_IDENTITY_REG(bank), in gen11_gt_engine_identity()
137 intr_dw = raw_reg_read(gt->uncore, GEN11_GT_INTR_DW(bank)); in gen11_gt_bank_handler()
146 raw_reg_write(gt->uncore, GEN11_GT_INTR_DW(bank), intr_dw); in gen11_gt_bank_handler()
170 dw = raw_reg_read(gt->uncore, GEN11_GT_INTR_DW(bank)); in gen11_gt_reset_one_iir()
184 raw_reg_write(gt->uncore, GEN11_GT_INTR_DW(bank), BIT(bit)); in gen11_gt_reset_one_iir()
194 struct intel_uncore *uncore = gt->uncore; in gen11_gt_irq_reset() local
197 intel_uncore_write(uncore, GEN11_RENDER_COPY_INTR_ENABLE, 0); in gen11_gt_irq_reset()
198 intel_uncore_write(uncore, GEN11_VCS_VECS_INTR_ENABLE, 0); in gen11_gt_irq_reset()
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H A Ddebugfs_gt_pm.c28 struct intel_uncore *uncore = gt->uncore; in fw_domains_show() local
33 uncore->user_forcewake_count); in fw_domains_show()
35 for_each_fw_domain(fw_domain, uncore, tmp) in fw_domains_show()
51 with_intel_runtime_pm(gt->uncore->rpm, wakeref) in print_rc6_res()
53 intel_uncore_read(gt->uncore, reg), in print_rc6_res()
60 struct intel_uncore *uncore = gt->uncore; in vlv_drpc() local
63 pw_status = intel_uncore_read(uncore, VLV_GTLC_PW_STATUS); in vlv_drpc()
64 rcctl1 = intel_uncore_read(uncore, GEN6_RC_CONTROL); in vlv_drpc()
84 struct intel_uncore *uncore = gt->uncore; in gen6_drpc() local
88 gt_core_status = intel_uncore_read_fw(uncore, GEN6_GT_CORE_STATUS); in gen6_drpc()
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H A Dintel_rps.c43 return rps_to_gt(rps)->uncore; in rps_to_uncore()
51 static inline void set(struct intel_uncore *uncore, i915_reg_t reg, u32 val) in set() argument
53 intel_uncore_write_fw(uncore, reg, val); in set()
97 set(gt->uncore, GEN6_PMINTRMSK, rps_pm_mask(rps, rps->cur_freq)); in rps_enable_interrupts()
131 set(gt->uncore, GEN6_PMINTRMSK, rps_pm_sanitize_mask(rps, ~0u)); in rps_disable_interrupts()
167 struct intel_uncore *uncore = rps_to_uncore(rps); in gen5_rps_init() local
187 rgvmodectl = intel_uncore_read(uncore, MEMMODECTL); in gen5_rps_init()
207 struct intel_uncore *uncore = in __ips_chipset_val() local
226 total = intel_uncore_read(uncore, DMIEC); in __ips_chipset_val()
227 total += intel_uncore_read(uncore, DDREC); in __ips_chipset_val()
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H A Dintel_gt.c31 gt->uncore = &i915->uncore; in intel_gt_init_early()
54 struct intel_uncore *uncore = gt->uncore; in init_unused_ring() local
56 intel_uncore_write(uncore, RING_CTL(base), 0); in init_unused_ring()
57 intel_uncore_write(uncore, RING_HEAD(base), 0); in init_unused_ring()
58 intel_uncore_write(uncore, RING_TAIL(base), 0); in init_unused_ring()
59 intel_uncore_write(uncore, RING_START(base), 0); in init_unused_ring()
84 struct intel_uncore *uncore = gt->uncore; in intel_gt_init_hw() local
90 intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL); in intel_gt_init_hw()
93 intel_uncore_rmw(uncore, HSW_IDICR, 0, IDIHASHMSK(0xf)); in intel_gt_init_hw()
96 intel_uncore_write(uncore, in intel_gt_init_hw()
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H A Dintel_gtt.c513 struct intel_uncore *uncore = gt->uncore; in gtt_write_workarounds() local
522 intel_uncore_write(uncore, in gtt_write_workarounds()
526 intel_uncore_write(uncore, in gtt_write_workarounds()
530 intel_uncore_write(uncore, in gtt_write_workarounds()
534 intel_uncore_write(uncore, in gtt_write_workarounds()
551 intel_uncore_rmw(uncore, in gtt_write_workarounds()
569 intel_uncore_write(uncore, in gtt_write_workarounds()
573 intel_uncore_read(uncore, in gtt_write_workarounds()
602 static void tgl_setup_private_ppat(struct intel_uncore *uncore) in tgl_setup_private_ppat() argument
605 intel_uncore_write(uncore, GEN12_PAT_INDEX(0), GEN8_PPAT_WB); in tgl_setup_private_ppat()
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H A Dintel_gt_pm_irq.c21 struct intel_uncore *uncore = gt->uncore; in write_pm_imr() local
34 intel_uncore_write(uncore, reg, mask); in write_pm_imr()
69 struct intel_uncore *uncore = gt->uncore; in gen6_gt_pm_reset_iir() local
74 intel_uncore_write(uncore, reg, reset_mask); in gen6_gt_pm_reset_iir()
75 intel_uncore_write(uncore, reg, reset_mask); in gen6_gt_pm_reset_iir()
76 intel_uncore_posting_read(uncore, reg); in gen6_gt_pm_reset_iir()
82 struct intel_uncore *uncore = gt->uncore; in write_pm_ier() local
95 intel_uncore_write(uncore, reg, mask); in write_pm_ier()
H A Dintel_reset.c38 static void rmw_set_fw(struct intel_uncore *uncore, i915_reg_t reg, u32 set) in rmw_set_fw() argument
40 intel_uncore_rmw_fw(uncore, reg, 0, set); in rmw_set_fw()
43 static void rmw_clear_fw(struct intel_uncore *uncore, i915_reg_t reg, u32 clr) in rmw_clear_fw() argument
45 intel_uncore_rmw_fw(uncore, reg, clr, 0); in rmw_clear_fw()
225 struct intel_uncore *uncore = gt->uncore; in g4x_do_reset() local
229 rmw_set_fw(uncore, VDECCLK_GATE_D, VCP_UNIT_CLOCK_GATE_DISABLE); in g4x_do_reset()
230 intel_uncore_posting_read_fw(uncore, VDECCLK_GATE_D); in g4x_do_reset()
251 rmw_clear_fw(uncore, VDECCLK_GATE_D, VCP_UNIT_CLOCK_GATE_DISABLE); in g4x_do_reset()
252 intel_uncore_posting_read_fw(uncore, VDECCLK_GATE_D); in g4x_do_reset()
260 struct intel_uncore *uncore = gt->uncore; in ilk_do_reset() local
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H A Dintel_ring_submission.c511 intel_uncore_write(engine->uncore, HWS_PGA, addr); in set_hws_pga()
578 intel_uncore_write(engine->uncore, hwsp, offset); in set_hwsp()
579 intel_uncore_posting_read(engine->uncore, hwsp); in set_hwsp()
595 if (intel_wait_for_register(engine->uncore, in flush_cs_tlb()
618 if (intel_wait_for_register(engine->uncore, in stop_ring()
657 intel_uncore_forcewake_get(engine->uncore, FORCEWAKE_ALL); in xcs_resume()
714 if (intel_wait_for_register(engine->uncore, in xcs_resume()
744 intel_uncore_forcewake_put(engine->uncore, FORCEWAKE_ALL); in xcs_resume()
751 struct intel_uncore *uncore = engine->uncore; in reset_prepare() local
773 intel_uncore_write_fw(uncore, in reset_prepare()
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H A Dintel_engine_cs.c163 struct intel_uncore *uncore = gt->uncore; in intel_engine_context_size() local
187 cxt_size = intel_uncore_read(uncore, GEN7_CXT_SIZE); in intel_engine_context_size()
191 cxt_size = intel_uncore_read(uncore, CXT_SIZE); in intel_engine_context_size()
206 cxt_size = intel_uncore_read(uncore, CXT_SIZE) + 1; in intel_engine_context_size()
310 engine->uncore = gt->uncore; in intel_engine_setup()
881 struct intel_uncore *uncore = engine->uncore; in intel_engine_stop_cs() local
891 intel_uncore_write_fw(uncore, mode, _MASKED_BIT_ENABLE(STOP_RING)); in intel_engine_stop_cs()
894 if (__intel_wait_for_register_fw(uncore, in intel_engine_stop_cs()
903 intel_uncore_posting_read_fw(uncore, mode); in intel_engine_stop_cs()
931 struct intel_uncore *uncore = engine->uncore; in read_subslice_reg() local
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/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gt/uc/
H A Dintel_guc_fw.c35 static void guc_prepare_xfer(struct intel_uncore *uncore) in guc_prepare_xfer() argument
45 intel_uncore_write(uncore, GUC_SHIM_CONTROL, shim_flags); in guc_prepare_xfer()
47 if (IS_GEN9_LP(uncore->i915)) in guc_prepare_xfer()
48 intel_uncore_write(uncore, GEN9LP_GT_PM_CONFIG, GT_DOORBELL_ENABLE); in guc_prepare_xfer()
50 intel_uncore_write(uncore, GEN9_GT_PM_CONFIG, GT_DOORBELL_ENABLE); in guc_prepare_xfer()
52 if (IS_GEN(uncore->i915, 9)) { in guc_prepare_xfer()
54 intel_uncore_rmw(uncore, GEN7_MISCCPCTL, in guc_prepare_xfer()
58 intel_uncore_write(uncore, GUC_ARAT_C6DIS, 0x1FF); in guc_prepare_xfer()
64 struct intel_uncore *uncore) in guc_xfer_rsa() argument
74 intel_uncore_write(uncore, UOS_RSA_SCRATCH(i), rsa[i]); in guc_xfer_rsa()
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H A Dintel_guc.c52 intel_uncore_write(gt->uncore, guc->notify_reg, GUC_SEND_TRIGGER); in intel_guc_notify()
81 fw_domains |= intel_uncore_forcewake_for_reg(gt->uncore, in intel_guc_init_send_regs()
107 WARN_ON_ONCE(intel_uncore_read(gt->uncore, GEN8_GT_IIR(2)) & in gen9_enable_guc_interrupts()
150 intel_uncore_write(gt->uncore, in gen11_enable_guc_interrupts()
152 intel_uncore_write(gt->uncore, in gen11_enable_guc_interrupts()
166 intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_MASK, ~0); in gen11_disable_guc_interrupts()
167 intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_ENABLE, 0); in gen11_disable_guc_interrupts()
318 struct intel_uncore *uncore = guc_to_gt(guc)->uncore; in intel_guc_write_params() local
326 intel_uncore_forcewake_get(uncore, FORCEWAKE_BLITTER); in intel_guc_write_params()
328 intel_uncore_write(uncore, SOFT_SCRATCH(0), 0); in intel_guc_write_params()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/selftests/
H A Dintel_uncore.c150 struct intel_uncore *uncore = gt->uncore; in live_forcewake_ops() local
186 wakeref = intel_runtime_pm_get(uncore->rpm); in live_forcewake_ops()
188 for_each_fw_domain(domain, uncore, tmp) { in live_forcewake_ops()
198 u32 __iomem *reg = uncore->regs + engine->mmio_base + r->offset; in live_forcewake_ops()
205 fw_domains = intel_uncore_forcewake_for_reg(uncore, mmio, in live_forcewake_ops()
210 for_each_fw_domain_masked(domain, fw_domains, uncore, tmp) { in live_forcewake_ops()
220 intel_uncore_forcewake_get(uncore, fw_domains); in live_forcewake_ops()
222 intel_uncore_forcewake_put(uncore, fw_domains); in live_forcewake_ops()
225 for_each_fw_domain_masked(domain, fw_domains, uncore, tmp) { in live_forcewake_ops()
257 intel_runtime_pm_put(uncore->rpm, wakeref); in live_forcewake_ops()
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H A Dmock_uncore.c34 nop_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trace) { }
41 nop_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { return 0; }
47 void mock_uncore_init(struct intel_uncore *uncore, in mock_uncore_init() argument
50 intel_uncore_init_early(uncore, i915); in mock_uncore_init()
52 ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, nop); in mock_uncore_init()
53 ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, nop); in mock_uncore_init()
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/display/
H A Dintel_tc.c42 modular_fia = intel_uncore_read(&i915->uncore, in tc_port_load_fia_params()
65 struct intel_uncore *uncore = &i915->uncore; in intel_tc_port_get_lane_mask() local
68 lane_mask = intel_uncore_read(uncore, in intel_tc_port_get_lane_mask()
80 struct intel_uncore *uncore = &i915->uncore; in intel_tc_port_get_pin_assignment_mask() local
83 pin_mask = intel_uncore_read(uncore, in intel_tc_port_get_pin_assignment_mask()
127 struct intel_uncore *uncore = &i915->uncore; in intel_tc_port_set_fia_lane_count() local
132 val = intel_uncore_read(uncore, in intel_tc_port_set_fia_lane_count()
154 intel_uncore_write(uncore, in intel_tc_port_set_fia_lane_count()
183 struct intel_uncore *uncore = &i915->uncore; in tc_port_live_status_mask() local
187 val = intel_uncore_read(uncore, in tc_port_live_status_mask()
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H A Dintel_gmbus.c200 struct intel_uncore *uncore = &i915->uncore; in get_reserved() local
205 reserved = intel_uncore_read_notrace(uncore, bus->gpio_reg) & in get_reserved()
215 struct intel_uncore *uncore = &bus->dev_priv->uncore; in get_clock() local
218 intel_uncore_write_notrace(uncore, in get_clock()
221 intel_uncore_write_notrace(uncore, bus->gpio_reg, reserved); in get_clock()
223 return (intel_uncore_read_notrace(uncore, bus->gpio_reg) & in get_clock()
230 struct intel_uncore *uncore = &bus->dev_priv->uncore; in get_data() local
233 intel_uncore_write_notrace(uncore, in get_data()
236 intel_uncore_write_notrace(uncore, bus->gpio_reg, reserved); in get_data()
238 return (intel_uncore_read_notrace(uncore, bus->gpio_reg) & in get_data()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gem/
H A Di915_gem_stolen.c78 struct intel_uncore *uncore = ggtt->vm.gt->uncore; in i915_adjust_stolen() local
96 ggtt_start = intel_uncore_read(uncore, PGTBL_CTL); in i915_adjust_stolen()
176 struct intel_uncore *uncore, in g4x_get_stolen_reserved() argument
180 u32 reg_val = intel_uncore_read(uncore, in g4x_get_stolen_reserved()
212 struct intel_uncore *uncore, in gen6_get_stolen_reserved() argument
216 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED); in gen6_get_stolen_reserved()
245 struct intel_uncore *uncore, in vlv_get_stolen_reserved() argument
249 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED); in vlv_get_stolen_reserved()
274 struct intel_uncore *uncore, in gen7_get_stolen_reserved() argument
278 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED); in gen7_get_stolen_reserved()
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