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Searched refs:MayLoad (Results 1 – 11 of 11) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/MCA/HardwareUnits/
H A DLSUnit.cpp72 assert((Desc.MayLoad || Desc.MayStore) && "Not a memory operation!"); in dispatch()
74 if (Desc.MayLoad) in dispatch()
117 if (Desc.MayLoad) { in dispatch()
126 assert(Desc.MayLoad && "Expected a load!"); in dispatch()
197 if (Desc.MayLoad && isLQFull()) in isAvailable()
215 bool IsALoad = Desc.MayLoad; in onInstructionRetired()
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-mca/Views/
H A DSchedulerStatistics.cpp51 if (LQResourceID && Inst.getDesc().MayLoad && in onEvent()
63 if (LQResourceID && Inst.getDesc().MayLoad) { in onEvent()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/
H A DMCInstrDesc.h165 MayLoad, enumerator
429 bool mayLoad() const { return Flags & (1ULL << MCID::MayLoad); } in mayLoad()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MCA/
H A DInstruction.h373 bool MayLoad; member
439 bool isMemOp() const { return Desc.MayLoad || Desc.MayStore; } in isMemOp()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMips16InstrInfo.td515 class MayLoad {
788 def LbRxRyOffMemX16: FEXT_RRI16_mem_ins<0b10011, "lb", mem16, II_LB>, MayLoad{
798 FEXT_RRI16_mem_ins<0b10100, "lbu", mem16, II_LBU>, MayLoad {
807 def LhRxRyOffMemX16: FEXT_RRI16_mem_ins<0b10100, "lh", mem16, II_LH>, MayLoad{
817 FEXT_RRI16_mem_ins<0b10100, "lhu", mem16, II_LHU>, MayLoad {
844 def LwRxRyOffMemX16: FEXT_RRI16_mem_ins<0b10011, "lw", mem16, II_LW>, MayLoad{
852 def LwRxSpImmX16: FEXT_RRI16_mem_ins<0b10010, "lw", mem16sp, II_LW>, MayLoad;
854 def LwRxPcTcp16: FRI16_TCP_ins<0b10110, "lw", II_LW>, MayLoad;
856 def LwRxPcTcpX16: FEXT_RI16_TCP_ins<0b10110, "lw", II_LW>, MayLoad;
964 "", [], II_RESTORE >, MayLoad {
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/MCA/Stages/
H A DExecuteStage.cpp169 assert(!Desc.MayLoad && !Desc.MayStore && "Cannot eliminate a memory op!"); in verifyInstructionEliminated()
/netbsd-src/external/apache2/llvm/dist/llvm/docs/CommandGuide/
H A Dllvm-mca.rst344 [4]: MayLoad
438 properties (i.e., 'MayLoad', 'MayStore', and 'HasSideEffects').
458 [4]: MayLoad
939 cache. It only knows if an instruction "MayLoad" and/or "MayStore." For
945 has both "MayLoad" and unmodeled side effects behaves like a "soft"
948 effects are treated like store barriers. A full memory barrier is a "MayLoad"
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64LoadStoreOptimizer.cpp1530 bool MayLoad = FirstMI.mayLoad(); in findMatchingInsn() local
1673 if (MayLoad && in findMatchingInsn()
1708 if (!(MayLoad && in findMatchingInsn()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/MCA/
H A DInstrBuilder.cpp568 ID->MayLoad = MCDesc.mayLoad(); in createInstrDescImpl()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DMachineInstr.h1000 return hasProperty(MCID::MayLoad, Type);
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonPatterns.td3204 // because the SDNode ISD::PREFETCH has properties MayLoad and MayStore.