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/netbsd-src/external/gpl3/binutils.old/dist/bfd/
H A Dcoff-sh.c1553 #define LOAD (0x1) macro
1651 { 0x0083, LOAD | USES1 }, /* pref @rn */
1666 { 0x000c, LOAD | SETS1 | USES2 | USESR0 }, /* mov.b @(r0,rm),rn */
1667 { 0x000d, LOAD | SETS1 | USES2 | USESR0 }, /* mov.w @(r0,rm),rn */
1668 { 0x000e, LOAD | SETS1 | USES2 | USESR0 }, /* mov.l @(r0,rm),rn */
1669 { 0x000f, LOAD|SETS1|SETS2|SETSSP|USES1|USES2|USESSP }, /* mac.l @rm+,@rn+ */
1743 { 0x4006, LOAD | SETS1 | SETSSP | USES1 }, /* lds.l @rm+,mach */
1753 { 0x4016, LOAD | SETS1 | SETSSP | USES1 }, /* lds.l @rm+,macl */
1757 { 0x401b, LOAD | SETSSP | USES1 }, /* tas.b @rn */
1763 { 0x4026, LOAD | SETS1 | SETSSP | USES1 }, /* lds.l @rm+,pr */
[all …]
/netbsd-src/external/gpl3/binutils/dist/bfd/
H A Dcoff-sh.c1545 #define LOAD (0x1) macro
1643 { 0x0083, LOAD | USES1 }, /* pref @rn */
1658 { 0x000c, LOAD | SETS1 | USES2 | USESR0 }, /* mov.b @(r0,rm),rn */
1659 { 0x000d, LOAD | SETS1 | USES2 | USESR0 }, /* mov.w @(r0,rm),rn */
1660 { 0x000e, LOAD | SETS1 | USES2 | USESR0 }, /* mov.l @(r0,rm),rn */
1661 { 0x000f, LOAD|SETS1|SETS2|SETSSP|USES1|USES2|USESSP }, /* mac.l @rm+,@rn+ */
1735 { 0x4006, LOAD | SETS1 | SETSSP | USES1 }, /* lds.l @rm+,mach */
1745 { 0x4016, LOAD | SETS1 | SETSSP | USES1 }, /* lds.l @rm+,macl */
1749 { 0x401b, LOAD | SETSSP | USES1 }, /* tas.b @rn */
1755 { 0x4026, LOAD | SETS1 | SETSSP | USES1 }, /* lds.l @rm+,pr */
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonDepIICHVX.td166 InstrItinData <tc_1ba8a0cd, /*SLOT01,LOAD,VA*/
212 InstrItinData <tc_3904b926, /*SLOT01,LOAD*/
227 InstrItinData <tc_3c56e5ce, /*SLOT0,NOSLOT1,LOAD,VP*/
251 InstrItinData <tc_453fe68d, /*SLOT01,LOAD,VA*/
267 InstrItinData <tc_52447ecc, /*SLOT01,LOAD*/
324 InstrItinData <tc_663c80a7, /*SLOT01,LOAD*/
339 InstrItinData <tc_7095ecba, /*SLOT1,LOAD,VA_DV*/
376 InstrItinData <tc_7d68d5c2, /*SLOT1,LOAD,VA*/
440 InstrItinData <tc_a28f32b5, /*SLOT1,LOAD,VA*/
446 InstrItinData <tc_a69eeee1, /*SLOT1,LOAD,VA_DV*/
[all …]
/netbsd-src/external/bsd/ntp/dist/sntp/libevent/
H A Devthread_win32.c116 #define LOAD(name) \ in evthread_win32_condvar_init() macro
118 LOAD(InitializeConditionVariable); in evthread_win32_condvar_init()
119 LOAD(SleepConditionVariableCS); in evthread_win32_condvar_init()
120 LOAD(WakeAllConditionVariable); in evthread_win32_condvar_init()
121 LOAD(WakeConditionVariable); in evthread_win32_condvar_init()
/netbsd-src/crypto/external/bsd/openssl/dist/crypto/
H A Dmem.c31 # define LOAD(x) 0 macro
38 # define LOAD(x) tsan_load(&x) macro
88 *mcount = LOAD(malloc_count); in CRYPTO_get_alloc_counts()
90 *rcount = LOAD(realloc_count); in CRYPTO_get_alloc_counts()
92 *fcount = LOAD(free_count); in CRYPTO_get_alloc_counts()
/netbsd-src/external/bsd/libevent/dist/
H A Devthread_win32.c117 #define LOAD(name) \ in evthread_win32_condvar_init() macro
119 LOAD(InitializeConditionVariable); in evthread_win32_condvar_init()
120 LOAD(SleepConditionVariableCS); in evthread_win32_condvar_init()
121 LOAD(WakeAllConditionVariable); in evthread_win32_condvar_init()
122 LOAD(WakeConditionVariable); in evthread_win32_condvar_init()
/netbsd-src/external/gpl3/gcc/dist/gcc/config/aarch64/
H A Daarch64-simd-builtins.def83 BUILTIN_VALLDIF (LOADSTRUCT, ld1x2, 0, LOAD)
84 BUILTIN_VSDQ_I_DI (LOADSTRUCT_U, ld1x2, 0, LOAD)
85 BUILTIN_VALLP (LOADSTRUCT_P, ld1x2, 0, LOAD)
87 BUILTIN_VALLDIF (LOADSTRUCT, ld1x3, 0, LOAD)
88 BUILTIN_VSDQ_I_DI (LOADSTRUCT_U, ld1x3, 0, LOAD)
89 BUILTIN_VALLP (LOADSTRUCT_P, ld1x3, 0, LOAD)
91 BUILTIN_VALLDIF (LOADSTRUCT, ld1x4, 0, LOAD)
92 BUILTIN_VSDQ_I_DI (LOADSTRUCT_U, ld1x4, 0, LOAD)
93 BUILTIN_VALLP (LOADSTRUCT_P, ld1x4, 0, LOAD)
109 BUILTIN_VALLDIF (LOADSTRUCT, ld2, 0, LOAD)
[all …]
H A Daarch64-builtins.cc2830 VAR1 (LOAD1, ld1, 0, LOAD, v8qi) in get_mem_type_for_load_store()
2833 VAR1 (LOAD1, ld1, 0, LOAD, v16qi) in get_mem_type_for_load_store()
2836 VAR1 (LOAD1, ld1, 0, LOAD, v4hi) in get_mem_type_for_load_store()
2839 VAR1 (LOAD1, ld1, 0, LOAD, v8hi) in get_mem_type_for_load_store()
2842 VAR1 (LOAD1, ld1, 0, LOAD, v2si) in get_mem_type_for_load_store()
2845 VAR1 (LOAD1, ld1, 0, LOAD, v4si) in get_mem_type_for_load_store()
2848 VAR1 (LOAD1, ld1, 0, LOAD, v2di) in get_mem_type_for_load_store()
2851 VAR1 (LOAD1_U, ld1, 0, LOAD, v8qi) in get_mem_type_for_load_store()
2854 VAR1 (LOAD1_U, ld1, 0, LOAD, v16qi) in get_mem_type_for_load_store()
2857 VAR1 (LOAD1_U, ld1, 0, LOAD, v4hi) in get_mem_type_for_load_store()
[all …]
/netbsd-src/tests/lib/libc/sys/
H A Dt_futex_ops.c52 #define LOAD(x) (*(volatile int *)(x)) macro
296 } while (LOAD(d->futex_ptr) != 0); in wait_wake_test_waiter_lwp()
304 } while (LOAD(d->futex_ptr) != 3); in wait_wake_test_waiter_lwp()
357 if (LOAD(futex_ptr) == 1) in do_futex_wait_wake_test()
362 ATF_REQUIRE(LOAD(futex_ptr) == 1); in do_futex_wait_wake_test()
369 LOAD(error_ptr))); in do_futex_wait_wake_test()
372 if (LOAD(error_ptr) == -1) in do_futex_wait_wake_test()
377 ATF_REQUIRE(LOAD(error_ptr) == -1); in do_futex_wait_wake_test()
389 LOAD(error_ptr))); in do_futex_wait_wake_test()
392 if (LOAD(error_pt in do_futex_wait_wake_test()
[all...]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZPatterns.td39 // with LOAD, OPERATOR and STORE being the read, modify and write
57 // The inserted operand is loaded using LOAD from an address of mode MODE.
97 // condition is false. Record that they are equivalent to a LOAD/select/STORE
114 // Try to use MVC instruction INSN for a load of type LOAD followed by a store
116 // LENGTH is the number of bytes loaded by LOAD.
124 // The other operand is a load of type LOAD, which accesses LENGTH bytes.
134 // LOAD/VT/LENGTH combination.
147 // Record that INSN is a LOAD AND TEST that can be used to compare
/netbsd-src/sys/dev/microcode/siop/
H A Desiop.ss120 LOAD SCRATCHB0, 4, abs_sem; pending done command ?
153 LOAD DSA0, 4, FROM 0; now load DSA for this target
167 LOAD SCRATCHB0, 4, from target_luntbl_tag; in case it's a tagged cmd
168 LOAD DSA0, 4, from target_luntbl; load DSA for this LUN
193 LOAD DSA0, 4, from 0; load DSA for this tag
223 LOAD SCRATCHA0, 1, from 0;
244 LOAD SCRATCHB0, 4, abs_sem; signal that a command is done
262 LOAD DSA0,4, from o_cmd_dsa; get DSA and flags for this slot
267 LOAD SCRATCHC0, 4, FROM tlq_offset;
305 LOAD SCRATCHB0, 4, FROM o_cmd_dsa; load DSA for this command in temp reg
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIMemoryLegalizer.cpp43 LOAD = 1u << 0, enumerator
856 assert( Op == SIMemOp::LOAD || Op == SIMemOp::STORE); in enableVolatileAndOrNonTemporal()
861 if (Op == SIMemOp::LOAD) in enableVolatileAndOrNonTemporal()
1032 return insertWait(MI, Scope, AddrSpace, SIMemOp::LOAD | SIMemOp::STORE, in insertRelease()
1201 assert( Op == SIMemOp::LOAD || Op == SIMemOp::STORE); in enableVolatileAndOrNonTemporal()
1206 if (Op == SIMemOp::LOAD) { in enableVolatileAndOrNonTemporal()
1361 assert( Op == SIMemOp::LOAD || Op == SIMemOp::STORE); in enableVolatileAndOrNonTemporal()
1367 if (Op == SIMemOp::LOAD) { in enableVolatileAndOrNonTemporal()
1414 if ((Op & SIMemOp::LOAD) != SIMemOp::NONE) in insertWait()
1426 if ((Op & SIMemOp::LOAD) != SIMemOp::NONE) in insertWait()
[all …]
/netbsd-src/lib/libcrypt/
H A Dcrypt.c257 #define LOAD(d,d0,d1,bl) d0 = (bl).b32.i0, d1 = (bl).b32.i1 macro
268 LOAD(d,d0,d1,(p)[(0<<CHUNKBITS)+(cpp)[0]]); \
277 LOAD(d,d0,d1,(p)[(0<<CHUNKBITS)+(cpp)[0]]); \
286 { C_block tblk; permute(cpp,&tblk,p,8); LOAD (d,d0,d1,tblk); }
288 { C_block tblk; permute(cpp,&tblk,p,4); LOAD (d,d0,d1,tblk); }
765 LOAD(L,L0,L1,B); in des_cipher()
767 LOAD(L,L0,L1,*(const C_block *)in); in des_cipher()
/netbsd-src/external/gpl3/binutils.old/dist/cpu/
H A Diq2000m.cpu182 (dni cfc0 "control from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
188 (dni cfc1 "control from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
194 (dni cfc2 "control from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
200 (dni cfc3 "control from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
210 (dni chkhdr "check header" (MACH2000 LOAD-DELAY USES-RD YIELD-INSN)
324 (dni mfc0 "move from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
330 (dni mfc1 "move from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
336 (dni mfc2 "move from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
342 (dni mfc3 "move from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
561 (dni ldw "load double word" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT)
[all …]
/netbsd-src/external/gpl3/gdb.old/dist/cpu/
H A Diq2000m.cpu182 (dni cfc0 "control from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
188 (dni cfc1 "control from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
194 (dni cfc2 "control from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
200 (dni cfc3 "control from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
210 (dni chkhdr "check header" (MACH2000 LOAD-DELAY USES-RD YIELD-INSN)
324 (dni mfc0 "move from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
330 (dni mfc1 "move from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
336 (dni mfc2 "move from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
342 (dni mfc3 "move from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
561 (dni ldw "load double word" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT)
[all …]
/netbsd-src/external/gpl3/binutils/dist/cpu/
H A Diq2000m.cpu182 (dni cfc0 "control from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
188 (dni cfc1 "control from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
194 (dni cfc2 "control from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
200 (dni cfc3 "control from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
210 (dni chkhdr "check header" (MACH2000 LOAD-DELAY USES-RD YIELD-INSN)
324 (dni mfc0 "move from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
330 (dni mfc1 "move from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
336 (dni mfc2 "move from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
342 (dni mfc3 "move from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
561 (dni ldw "load double word" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT)
[all …]
/netbsd-src/external/gpl3/gdb/dist/cpu/
H A Diq2000m.cpu182 (dni cfc0 "control from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
188 (dni cfc1 "control from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
194 (dni cfc2 "control from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
200 (dni cfc3 "control from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
210 (dni chkhdr "check header" (MACH2000 LOAD-DELAY USES-RD YIELD-INSN)
324 (dni mfc0 "move from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
330 (dni mfc1 "move from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
336 (dni mfc2 "move from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
342 (dni mfc3 "move from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
561 (dni ldw "load double word" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT)
[all …]
/netbsd-src/sys/external/isc/libsodium/dist/src/libsodium/crypto_generichash/blake2b/ref/
H A Dblake2b-compress-avx2.h11 #define LOAD(p) _mm256_load_si256((__m256i *) (p)) macro
130 __m256i c = LOAD(&blake2b_IV[0]); \
132 XOR(LOAD(&blake2b_IV[4]), _mm256_set_epi64x(f1, f0, t1, t0)); \
/netbsd-src/external/gpl3/binutils.old/dist/ld/
H A Dldgram.h154 LOAD = 355, /* LOAD */ enumerator
294 #define LOAD 355 macro
/netbsd-src/tests/usr.bin/config/support/arch/regress/conf/
H A DMakefile.regress27 %LOAD
/netbsd-src/external/gpl3/binutils/dist/ld/
H A Dldgram.h158 LOAD = 359, /* LOAD */ enumerator
302 #define LOAD 359 macro
/netbsd-src/sys/arch/vax/floppy/
H A Dupsboo.cmd11 LOAD BOOT
H A Dhksboo.cmd11 LOAD BOOT
H A Dupmboo.cmd11 LOAD BOOT
H A Dhkmboo.cmd11 LOAD BOOT

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