| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRAsmBackend.cpp | 38 std::string Description, const MCFixup &Fixup, in signed_width() argument
50 Ctx->reportFatalError(Fixup.getLoc(), Diagnostic); in signed_width()
58 std::string Description, const MCFixup &Fixup, in unsigned_width() argument
69 Ctx->reportFatalError(Fixup.getLoc(), Diagnostic); in unsigned_width()
77 static void adjustBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value, in adjustBranch() argument
81 unsigned_width(Size + 1, Value, std::string("branch target"), Fixup, Ctx); in adjustBranch()
88 static void adjustRelativeBranch(unsigned Size, const MCFixup &Fixup, in adjustRelativeBranch() argument
92 signed_width(Size + 1, Value, std::string("branch target"), Fixup, Ctx); in adjustRelativeBranch()
104 static void fixup_call(unsigned Size, const MCFixup &Fixup, uint64_t &Value, in fixup_call() argument
106 adjustBranch(Size, Fixup, Value, Ctx); in fixup_call()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64ELFObjectWriter.cpp | 39 const MCFixup &Fixup, bool IsPCRel) const override;
57 static bool isNonILP32reloc(const MCFixup &Fixup, in isNonILP32reloc() argument
60 if (Fixup.getTargetKind() != AArch64::fixup_aarch64_movw) in isNonILP32reloc()
64 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G3)); in isNonILP32reloc()
67 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G2)); in isNonILP32reloc()
70 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_SABS_G2)); in isNonILP32reloc()
73 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G2_NC)); in isNonILP32reloc()
76 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_SABS_G1)); in isNonILP32reloc()
79 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G1_NC)); in isNonILP32reloc()
82 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSLD_MOVW_DTPREL_G2)); in isNonILP32reloc()
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| H A D | AArch64AsmBackend.cpp | 85 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
90 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
99 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
149 static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, in adjustFixupValue() argument
153 switch (Fixup.getTargetKind()) { in adjustFixupValue()
158 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
169 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
171 Ctx.reportError(Fixup.getLoc(), "fixup not sufficiently aligned"); in adjustFixupValue()
180 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
187 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
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| H A D | AArch64MachObjectWriter.cpp | 35 bool getAArch64FixupKindMachOInfo(const MCFixup &Fixup, unsigned &RelocType,
45 const MCFixup &Fixup, MCValue Target,
52 const MCFixup &Fixup, unsigned &RelocType, const MCSymbolRefExpr *Sym, in getAArch64FixupKindMachOInfo() argument
57 switch (Fixup.getTargetKind()) { in getAArch64FixupKindMachOInfo()
102 Asm.getContext().reportError(Fixup.getLoc(), in getAArch64FixupKindMachOInfo()
153 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, in recordRelocation() argument
155 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in recordRelocation()
163 unsigned Kind = Fixup.getKind(); in recordRelocation()
166 FixupOffset += Fixup.getOffset(); in recordRelocation()
182 Asm.getContext().reportError(Fixup.getLoc(), in recordRelocation()
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| H A D | AArch64WinCOFFObjectWriter.cpp | 38 const MCFixup &Fixup, bool IsCrossSection,
47 MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup, in getRelocType() argument
49 unsigned FixupKind = Fixup.getKind(); in getRelocType()
52 Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression"); in getRelocType()
60 const MCExpr *Expr = Fixup.getValue(); in getRelocType()
70 Ctx.reportError(Fixup.getLoc(), "relocation variant " + in getRelocType()
80 Ctx.reportError(Fixup.getLoc(), "relocation type " + in getRelocType()
84 const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind()); in getRelocType()
85 Ctx.reportError(Fixup.getLoc(), Twine("relocation type ") + Info.Name + in getRelocType()
153 bool AArch64WinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const { in recordRelocation()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MachObjectWriter.cpp | 31 const MCFixup &Fixup,
39 const MCFixup &Fixup,
47 const MCFixup &Fixup,
52 const MCFragment *Fragment, const MCFixup &Fixup,
61 const MCFixup &Fixup, MCValue Target, in recordRelocation() argument
64 RecordX86_64Relocation(Writer, Asm, Layout, Fragment, Fixup, Target, in recordRelocation()
67 RecordX86Relocation(Writer, Asm, Layout, Fragment, Fixup, Target, in recordRelocation()
104 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, in RecordX86_64Relocation() argument
106 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in RecordX86_64Relocation()
107 unsigned IsRIPRel = isFixupKindRIPRel(Fixup.getKind()); in RecordX86_64Relocation()
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| H A D | X86WinCOFFObjectWriter.cpp | 30 const MCFixup &Fixup, bool IsCrossSection,
42 const MCFixup &Fixup, in getRelocType() argument
45 unsigned FixupKind = Fixup.getKind(); in getRelocType()
48 Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression"); in getRelocType()
81 Ctx.reportError(Fixup.getLoc(), "unsupported relocation type"); in getRelocType()
103 Ctx.reportError(Fixup.getLoc(), "unsupported relocation type"); in getRelocType()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFAsmBackend.cpp | 29 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
38 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
61 void BPFAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup() argument
66 if (Fixup.getKind() == FK_SecRel_4 || Fixup.getKind() == FK_SecRel_8) { in applyFixup()
70 support::endian::write<uint32_t>(&Data[Fixup.getOffset() + 4], in applyFixup()
73 } else if (Fixup.getKind() == FK_Data_4) { in applyFixup()
74 support::endian::write<uint32_t>(&Data[Fixup.getOffset()], Value, Endian); in applyFixup()
75 } else if (Fixup.getKind() == FK_Data_8) { in applyFixup()
76 support::endian::write<uint64_t>(&Data[Fixup.getOffset()], Value, Endian); in applyFixup()
77 } else if (Fixup.getKind() == FK_PCRel_4) { in applyFixup()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYAsmBackend.cpp | 54 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
56 switch (Fixup.getTargetKind()) { in adjustFixupValue()
68 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value."); in adjustFixupValue()
70 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned."); in adjustFixupValue()
75 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value."); in adjustFixupValue()
77 Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned."); in adjustFixupValue()
82 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value."); in adjustFixupValue()
84 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned."); in adjustFixupValue()
89 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value."); in adjustFixupValue()
91 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned."); in adjustFixupValue()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMachObjectWriter.cpp | 34 const MCFixup &Fixup,
43 const MCFixup &Fixup, MCValue Target,
57 const MCFixup &Fixup, MCValue Target,
144 const MCFixup &Fixup, in RecordARMScatteredHalfRelocation() argument
147 uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset(); in RecordARMScatteredHalfRelocation()
150 Asm.getContext().reportError(Fixup.getLoc(), in RecordARMScatteredHalfRelocation()
157 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in RecordARMScatteredHalfRelocation()
164 Asm.getContext().reportError(Fixup.getLoc(), in RecordARMScatteredHalfRelocation()
179 Asm.getContext().reportError(Fixup.getLoc(), in RecordARMScatteredHalfRelocation()
207 switch (Fixup.getTargetKind()) { in RecordARMScatteredHalfRelocation()
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| H A D | ARMELFObjectWriter.cpp | 30 unsigned GetRelocTypeInner(const MCValue &Target, const MCFixup &Fixup,
39 const MCFixup &Fixup, bool IsPCRel) const override;
73 const MCFixup &Fixup, in getRelocType() argument
75 return GetRelocTypeInner(Target, Fixup, IsPCRel, Ctx); in getRelocType()
79 const MCFixup &Fixup, in GetRelocTypeInner() argument
82 unsigned Kind = Fixup.getTargetKind(); in GetRelocTypeInner()
88 switch (Fixup.getTargetKind()) { in GetRelocTypeInner()
90 Ctx.reportFatalError(Fixup.getLoc(), "unsupported relocation on symbol"); in GetRelocTypeInner()
95 Ctx.reportError(Fixup.getLoc(), in GetRelocTypeInner()
162 Ctx.reportFatalError(Fixup.getLoc(), "unsupported relocation on symbol"); in GetRelocTypeInner()
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| H A D | ARMAsmBackend.cpp | 244 const char *ARMAsmBackend::reasonForFixupRelaxation(const MCFixup &Fixup, in reasonForFixupRelaxation() argument
246 switch (Fixup.getTargetKind()) { in reasonForFixupRelaxation()
323 bool ARMAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
326 return reasonForFixupRelaxation(Fixup, Value); in fixupNeedsRelaxation()
427 const MCFixup &Fixup, in adjustFixupValue() argument
431 unsigned Kind = Fixup.getKind(); in adjustFixupValue()
449 Ctx.reportError(Fixup.getLoc(), "bad relocation fixup type"); in adjustFixupValue()
504 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value"); in adjustFixupValue()
525 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value"); in adjustFixupValue()
556 dyn_cast<MCSymbolRefExpr>(Fixup.getValue())) in adjustFixupValue()
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| H A D | ARMWinCOFFObjectWriter.cpp | 37 const MCFixup &Fixup, bool IsCrossSection,
47 const MCFixup &Fixup, in getRelocType() argument
53 unsigned FixupKind = Fixup.getKind(); in getRelocType()
56 Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression"); in getRelocType()
65 const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind()); in getRelocType()
96 bool ARMWinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const { in recordRelocation()
97 return static_cast<unsigned>(Fixup.getKind()) != ARM::fixup_t2_movt_hi16; in recordRelocation()
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| H A D | ARMAsmBackend.h | 44 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
47 unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup,
52 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
62 const char *reasonForFixupRelaxation(const MCFixup &Fixup,
65 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430AsmBackend.cpp | 32 uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
40 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
50 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
56 bool fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved, in fixupNeedsRelaxationAdvanced() argument
96 uint64_t MSP430AsmBackend::adjustFixupValue(const MCFixup &Fixup, in adjustFixupValue() argument
99 unsigned Kind = Fixup.getKind(); in adjustFixupValue()
103 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned"); in adjustFixupValue()
113 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
125 void MSP430AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup() argument
130 Value = adjustFixupValue(Fixup, Value, Asm.getContext()); in applyFixup()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVAsmBackend.cpp | 94 const MCFixup &Fixup, in shouldForceRelocation() argument
96 if (Fixup.getKind() >= FirstLiteralRelocationKind) in shouldForceRelocation()
98 switch (Fixup.getTargetKind()) { in shouldForceRelocation()
117 bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, in fixupNeedsRelaxationAdvanced() argument
131 switch (Fixup.getTargetKind()) { in fixupNeedsRelaxationAdvanced()
221 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
223 switch (Fixup.getTargetKind()) { in adjustFixupValue()
251 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
253 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned"); in adjustFixupValue()
268 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
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| H A D | RISCVELFObjectWriter.cpp | 38 const MCFixup &Fixup, bool IsPCRel) const override;
50 const MCFixup &Fixup, in getRelocType() argument
52 const MCExpr *Expr = Fixup.getValue(); in getRelocType()
54 unsigned Kind = Fixup.getTargetKind(); in getRelocType()
60 Ctx.reportError(Fixup.getLoc(), "Unsupported relocation type"); in getRelocType()
94 Ctx.reportError(Fixup.getLoc(), "Unsupported relocation type"); in getRelocType()
97 Ctx.reportError(Fixup.getLoc(), "1-byte data relocations not supported"); in getRelocType()
100 Ctx.reportError(Fixup.getLoc(), "2-byte data relocations not supported"); in getRelocType()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsAsmBackend.cpp | 38 static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
41 unsigned Kind = Fixup.getKind(); in adjustFixupValue()
82 Ctx.reportError(Fixup.getLoc(), "out of range PC16 fixup"); in adjustFixupValue()
92 Ctx.reportError(Fixup.getLoc(), "out of range PC19 fixup"); in adjustFixupValue()
131 Ctx.reportError(Fixup.getLoc(), "out of range PC7 fixup"); in adjustFixupValue()
141 Ctx.reportError(Fixup.getLoc(), "out of range PC10 fixup"); in adjustFixupValue()
151 Ctx.reportError(Fixup.getLoc(), "out of range PC16 fixup"); in adjustFixupValue()
160 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue()
167 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue()
173 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MCFixup.h | 110 static MCFixup createAddFor(const MCFixup &Fixup) { in createAddFor() argument
112 FI.Value = Fixup.getValue(); in createAddFor()
113 FI.Offset = Fixup.getOffset(); in createAddFor()
114 FI.Kind = getAddKindForKind(Fixup.getKind()); in createAddFor()
115 FI.Loc = Fixup.getLoc(); in createAddFor()
121 static MCFixup createSubFor(const MCFixup &Fixup) { in createSubFor() argument
123 FI.Value = Fixup.getValue(); in createSubFor()
124 FI.Offset = Fixup.getOffset(); in createSubFor()
125 FI.Kind = getSubKindForKind(Fixup.getKind()); in createSubFor()
126 FI.Loc = Fixup.getLoc(); in createSubFor()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUAsmBackend.cpp | 32 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
36 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
63 bool AMDGPUAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, in fixupNeedsRelaxation() argument
106 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
110 switch (Fixup.getTargetKind()) { in adjustFixupValue()
115 Ctx->reportError(Fixup.getLoc(), "branch size exceeds simm16"); in adjustFixupValue()
131 void AMDGPUAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup() argument
136 Value = adjustFixupValue(Fixup, Value, &Asm.getContext()); in applyFixup()
140 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind()); in applyFixup()
145 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); in applyFixup()
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| H A D | AMDGPUELFObjectWriter.cpp | 26 const MCFixup &Fixup, bool IsPCRel) const override;
41 const MCFixup &Fixup, in getRelocType() argument
68 switch (Fixup.getKind()) { in getRelocType()
79 if (Fixup.getTargetKind() == AMDGPU::fixup_si_sopp_br) { in getRelocType()
83 Ctx.reportError(Fixup.getLoc(), in getRelocType()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcELFObjectWriter.cpp | 33 const MCFixup &Fixup, bool IsPCRel) const override;
43 const MCFixup &Fixup, in getRelocType() argument
46 if (const SparcMCExpr *SExpr = dyn_cast<SparcMCExpr>(Fixup.getValue())) { in getRelocType()
52 switch(Fixup.getTargetKind()) { in getRelocType()
68 switch(Fixup.getTargetKind()) { in getRelocType()
72 case FK_Data_2: return ((Fixup.getOffset() % 2) in getRelocType()
75 case FK_Data_4: return ((Fixup.getOffset() % 4) in getRelocType()
78 case FK_Data_8: return ((Fixup.getOffset() % 8) in getRelocType()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/MCTargetDesc/ |
| H A D | VEAsmBackend.cpp | 130 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, in shouldForceRelocation() argument
132 switch ((VE::Fixups)Fixup.getKind()) { in shouldForceRelocation()
153 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
186 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup() argument
190 Value = adjustFixupValue(Fixup.getKind(), Value); in applyFixup()
194 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind()); in applyFixup()
199 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); in applyFixup()
200 unsigned Offset = Fixup.getOffset(); in applyFixup()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/MC/ |
| H A D | MCAssembler.cpp | 193 const MCFixup &Fixup, const MCFragment *DF, in evaluateFixup() argument
204 const MCExpr *Expr = Fixup.getValue(); in evaluateFixup()
208 if (!Expr->evaluateAsRelocatable(Target, &Layout, &Fixup)) { in evaluateFixup()
209 Ctx.reportError(Fixup.getLoc(), "expected relocatable expression"); in evaluateFixup()
214 Ctx.reportError(Fixup.getLoc(), in evaluateFixup()
221 bool IsTarget = getBackendPtr()->getFixupKindInfo(Fixup.getKind()).Flags & in evaluateFixup()
225 return getBackend().evaluateTargetFixup(*this, Layout, Fixup, DF, Target, in evaluateFixup()
228 unsigned FixupFlags = getBackendPtr()->getFixupKindInfo(Fixup.getKind()).Flags; in evaluateFixup()
229 bool IsPCRel = getBackendPtr()->getFixupKindInfo(Fixup.getKind()).Flags & in evaluateFixup()
266 bool ShouldAlignPC = getBackend().getFixupKindInfo(Fixup.getKind()).Flags & in evaluateFixup()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
| H A D | WebAssemblyAsmBackend.cpp | 47 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
56 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
95 const MCFixup &Fixup, in applyFixup() argument
100 const MCFixupKindInfo &Info = getFixupKindInfo(Fixup.getKind()); in applyFixup()
110 unsigned Offset = Fixup.getOffset(); in applyFixup()
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