Home
last modified time | relevance | path

Searched refs:subvector (Results 1 – 12 of 12) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstrVecCompiler.td75 // A 128-bit subvector extract from the first 256-bit vector position is a
76 // subregister copy that needs no instruction. Likewise, a 128-bit subvector
87 // A 128-bit subvector extract from the first 512-bit vector position is a
88 // subregister copy that needs no instruction. Likewise, a 128-bit subvector
99 // A 128-bit subvector extract from the first 512-bit vector position is a
100 // subregister copy that needs no instruction. Likewise, a 128-bit subvector
H A DX86InstrFormats.td131 // The tuple (subvector) forms.
H A DX86InstrAVX512.td90 // 8-bit compressed displacement tuple/subvector format. This is only
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonVectorCombine.cpp119 Value *subvector(IRBuilderBase &Builder, Value *Val, unsigned Start,
1378 ChopOp.X.Val = HVC.subvector(Builder, X, V * ChopLen, ChopLen); in processFxpMul()
1379 ChopOp.Y.Val = HVC.subvector(Builder, Y, V * ChopLen, ChopLen); in processFxpMul()
2088 auto HexagonVectorCombine::subvector(IRBuilderBase &Builder, Value *Val, in subvector() function in HexagonVectorCombine
2099 return subvector(Builder, Val, 0, Len / 2); in sublo()
2106 return subvector(Builder, Val, Len / 2, Len / 2); in subhi()
/openbsd-src/gnu/llvm/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td283 def SDTSubVecExtract : SDTypeProfile<1, 2, [// subvector extract
286 def SDTSubVecInsert : SDTypeProfile<1, 3, [ // subvector insert
719 // This operator does not do subvector type checking. The ARM
728 // This operator does subvector type checking.
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.td36 // subvector in the same way the lower 128bits can.
H A DAArch64InstrInfo.td7587 // Multiply high patterns which multiply the lower subvector using smull/umull
7588 // and the upper subvector with smull2/umull2. Then shuffle the high the high
8263 // A 64-bit subvector insert to the first 128-bit vector position
/openbsd-src/gnu/llvm/llvm/include/llvm/IR/
H A DIntrinsics.td2110 //===---------- Intrinsics to perform subvector insertion/extraction ------===//
/openbsd-src/gnu/llvm/llvm/docs/
H A DCodeGenerator.rst963 * Insert subvector --- A vector is placed into a longer vector type starting
967 * Extract subvector --- A vector is pulled from a longer vector type starting
H A DAMDGPUUsage.rst4553 … SHARED_VGPR_COUNT Number of shared VGPR blocks when executing in subvector mode. For
H A DLangRef.rst17642 The ``vec`` is the vector from which we will extract a subvector.
17645 subvector is extracted. ``idx`` must be a constant multiple of the known-minimum
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMInstrNEON.td1096 // A 64-bit subvector insert to the first 128-bit vector position