Searched refs:pseudoToMCOpcode (Results 1 – 8 of 8) sorted by relevance
129 OutMI.setOpcode(TII->pseudoToMCOpcode(AMDGPU::S_SWAPPC_B64)); in lower()141 int MCOpcode = TII->pseudoToMCOpcode(Opcode); in lower()
157 if (DPP32 != -1 && TII->pseudoToMCOpcode(DPP32) != -1) in getDPPOp()162 if (DPP64 != -1 && TII->pseudoToMCOpcode(DPP64) != -1) in getDPPOp()
1051 return get(pseudoToMCOpcode(Opcode)); in getMCOpcodeFromPseudo()1150 int pseudoToMCOpcode(int Opcode) const;
1057 return pseudoToMCOpcode(NewOpc) != -1 ? NewOpc : -1; in commuteOpcode()1063 return pseudoToMCOpcode(NewOpc) != -1 ? NewOpc : -1; in commuteOpcode()3135 if (pseudoToMCOpcode(NewOpc) == -1) in FoldImmediate()3215 if (pseudoToMCOpcode(NewOpc) == -1) in FoldImmediate()3508 if (pseudoToMCOpcode(NewOpc) != -1) { in convertToThreeAddress()3527 if (pseudoToMCOpcode(NewOpc) != -1) { in convertToThreeAddress()3545 if (pseudoToMCOpcode(NewOpc) != -1 && in convertToThreeAddress()3577 if (pseudoToMCOpcode(NewOpc) == -1) in convertToThreeAddress()3885 return pseudoToMCOpcode(Op32) != -1; in hasVALU32BitEncoding()8044 int SIInstrInfo::pseudoToMCOpcode(int Opcode) const { in pseudoToMCOpcode() function in SIInstrInfo
614 return InstrInfo.pseudoToMCOpcode(AMDGPU::V_MAD_F16_e64) != -1; in hasMadF16()
1739 return !(NoSrc2Mods && (TII->pseudoToMCOpcode(I.getOpcode()) == in fixWMMAHazards()1740 TII->pseudoToMCOpcode(MI->getOpcode()))); in fixWMMAHazards()
952 if (TII->pseudoToMCOpcode(Opc) == -1) in isConvertibleToSDWA()
4353 if (TII->pseudoToMCOpcode(Opc) == -1) { in EmitInstrWithCustomInserter()9789 N->isDivergent() && TII->pseudoToMCOpcode(AMDGPU::V_PERM_B32_e64) != -1) { in performAndCombine()9886 N->isDivergent() && TII->pseudoToMCOpcode(AMDGPU::V_PERM_B32_e64) != -1) { in performOrCombine()