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Searched refs:max_memory_clock (Results 1 – 7 of 7) sorted by relevance

/openbsd-src/sys/dev/pci/drm/amd/include/
H A Ddm_pp_interface.h140 uint32_t max_memory_clock; member
/openbsd-src/sys/dev/pci/drm/include/uapi/drm/
H A Damdgpu_drm.h1066 __u64 max_memory_clock; member
/openbsd-src/sys/dev/pci/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c458 static_clk_info->max_mclk_khz = pp_clk_info.max_memory_clock * 10; in dm_pp_get_static_clocks()
/openbsd-src/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_kms.c811 dev_info->max_memory_clock = amdgpu_dpm_get_mclk(adev, false) * 10; in amdgpu_info_ioctl()
818 dev_info->max_memory_clock = in amdgpu_info_ioctl()
/openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/
H A Damd_powerplay.c1085 clocks->max_memory_clock = hw_clocks.max_mem_clk; in pp_get_current_clocks()
/openbsd-src/sys/dev/pci/drm/amd/pm/swsmu/smu11/
H A Dnavi10_ppt.c2334 uint32_t max_memory_clock = max_sustainable_clocks->uclock;
2340 ret = smu_v11_0_set_hard_freq_limited_range(smu, SMU_UCLK, max_memory_clock, 0); in navi10_get_power_limit()
2319 uint32_t max_memory_clock = max_sustainable_clocks->uclock; navi10_display_disable_memory_clock_switch() local
H A Dsienna_cichlid_ppt.c2069 uint32_t max_memory_clock = max_sustainable_clocks->uclock; in sienna_cichlid_display_disable_memory_clock_switch() local
2075 ret = smu_v11_0_set_hard_freq_limited_range(smu, SMU_UCLK, max_memory_clock, 0); in sienna_cichlid_display_disable_memory_clock_switch()