Home
last modified time | relevance | path

Searched refs:ixDPCSSYS_CR2_LANE3_ANA_TX_TERM_CODE_CTRL (Results 1 – 4 of 4) sorted by relevance

/openbsd-src/sys/dev/pci/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h4826 #define ixDPCSSYS_CR2_LANE3_ANA_TX_TERM_CODE_CTRL … macro
H A Ddpcs_4_2_0_offset.h6195 #define ixDPCSSYS_CR2_LANE3_ANA_TX_TERM_CODE_CTRL … macro
H A Ddpcs_4_2_3_offset.h6234 #define ixDPCSSYS_CR2_LANE3_ANA_TX_TERM_CODE_CTRL … macro
H A Ddpcs_4_2_2_offset.h6202 #define ixDPCSSYS_CR2_LANE3_ANA_TX_TERM_CODE_CTRL … macro