/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | GenericMachineInstrs.h | 35 return isPreISelGenericOpcode(MI->getOpcode()); in classof() 66 switch (MI->getOpcode()) { in classof() 85 switch (MI->getOpcode()) { in classof() 100 return MI->getOpcode() == TargetOpcode::G_LOAD; in classof() 108 return MI->getOpcode() == TargetOpcode::G_SEXTLOAD || in classof() 109 MI->getOpcode() == TargetOpcode::G_ZEXTLOAD; in classof() 117 return MI->getOpcode() == TargetOpcode::G_SEXTLOAD; in classof() 125 return MI->getOpcode() == TargetOpcode::G_ZEXTLOAD; in classof() 136 return MI->getOpcode() == TargetOpcode::G_STORE; in classof() 149 return MI->getOpcode() == TargetOpcode::G_UNMERGE_VALUES; in classof() [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64MacroFusion.cpp | 24 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair() 39 switch (FirstMI->getOpcode()) { in isArithmeticBccPair() 73 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair() 74 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair() 75 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair() 76 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair() 83 switch (FirstMI->getOpcode()) { in isArithmeticCbzPair() 124 switch (SecondMI.getOpcode()) { in isAESPair() 128 return FirstMI == nullptr || FirstMI->getOpcode() == AArch64::AESErr; in isAESPair() 132 return FirstMI == nullptr || FirstMI->getOpcode() == AArch64::AESDrr; in isAESPair() [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/SPIRV/ |
H A D | SPIRVInstrInfo.cpp | 29 switch (MI.getOpcode()) { in isConstantInstr() 55 return MI.getOpcode() == SPIRV::OpTypeForwardPointer; in isTypeDeclInstr() 60 switch (MI.getOpcode()) { in isDecorationInstr() 73 switch (MI.getOpcode()) { in isHeaderInstr() 95 switch (MI.getOpcode()) { in canUseFastMathFlags() 114 switch (MI.getOpcode()) { in canUseNSW() 131 switch (MI.getOpcode()) { in canUseNUW() 183 if (MI->getOpcode() == SPIRV::OpBranch) { in analyzeBranch() 186 } else if (MI->getOpcode() == SPIRV::OpBranchConditional) { in analyzeBranch() 248 if (MI.getOpcode() == SPIRV::GET_ID || MI.getOpcode() == SPIRV::GET_fID || in expandPostRAPseudo() [all …]
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H A D | SPIRVPreLegalizer.cpp | 66 BuildVec->getOpcode() == TargetOpcode::G_BUILD_VECTOR); in addConstantsToTrack() 107 assert(ConstMI->getOpcode() == TargetOpcode::G_CONSTANT); in foldConstantsIntoIntrinsics() 154 switch (MI->getOpcode()) { in propagateSPIRVType() 245 if (Def->getOpcode() != TargetOpcode::G_GLOBAL_VALUE) in generateAssignInstrs() 248 } else if (MI.getOpcode() == TargetOpcode::G_CONSTANT || in generateAssignInstrs() 249 MI.getOpcode() == TargetOpcode::G_FCONSTANT || in generateAssignInstrs() 250 MI.getOpcode() == TargetOpcode::G_BUILD_VECTOR) { in generateAssignInstrs() 264 if (MI.getOpcode() == TargetOpcode::G_CONSTANT) in generateAssignInstrs() 266 else if (MI.getOpcode() == TargetOpcode::G_FCONSTANT) in generateAssignInstrs() 269 assert(MI.getOpcode() == TargetOpcode::G_BUILD_VECTOR); in generateAssignInstrs() [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/VE/ |
H A D | VEISelDAGToDAG.cpp | 81 if (Addr.getOpcode() == ISD::FrameIndex) in INITIALIZE_PASS() 83 if (Addr.getOpcode() == ISD::TargetExternalSymbol || in INITIALIZE_PASS() 84 Addr.getOpcode() == ISD::TargetGlobalAddress || in INITIALIZE_PASS() 85 Addr.getOpcode() == ISD::TargetGlobalTLSAddress) in INITIALIZE_PASS() 145 if (Addr.getOpcode() == ISD::TargetExternalSymbol || in selectADDRzii() 146 Addr.getOpcode() == ISD::TargetGlobalAddress || in selectADDRzii() 147 Addr.getOpcode() == ISD::TargetGlobalTLSAddress) in selectADDRzii() 176 if (Addr.getOpcode() == ISD::TargetExternalSymbol || in selectADDRzi() 177 Addr.getOpcode() == ISD::TargetGlobalAddress || in selectADDRzi() 178 Addr.getOpcode() == ISD::TargetGlobalTLSAddress) in selectADDRzi() [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVMergeBaseOffset.cpp | 91 if (Hi.getOpcode() != RISCV::LUI && Hi.getOpcode() != RISCV::AUIPC) in INITIALIZE_PASS() 96 Hi.getOpcode() == RISCV::AUIPC ? RISCVII::MO_PCREL_HI : RISCVII::MO_HI; in INITIALIZE_PASS() 108 if (Lo->getOpcode() != RISCV::ADDI) in INITIALIZE_PASS() 112 if (Hi.getOpcode() == RISCV::LUI) { in INITIALIZE_PASS() 117 assert(Hi.getOpcode() == RISCV::AUIPC); in INITIALIZE_PASS() 143 if (Hi.getOpcode() != RISCV::AUIPC) in foldOffset() 176 assert((TailAdd.getOpcode() == RISCV::ADD) && "Expected ADD instruction!"); in foldLargeOffset() 186 if (OffsetTail.getOpcode() == RISCV::ADDI || in foldLargeOffset() 187 OffsetTail.getOpcode() == RISCV::ADDIW) { in foldLargeOffset() 197 if (OffsetLui.getOpcode() != RISCV::LUI || in foldLargeOffset() [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/BPF/ |
H A D | BPFMIChecking.cpp | 158 if (MI.getOpcode() != BPF::XADDW && in processAtomicInsts() 159 MI.getOpcode() != BPF::XADDD && in processAtomicInsts() 160 MI.getOpcode() != BPF::XADDW32) in processAtomicInsts() 189 if (MI.getOpcode() != BPF::XFADDW32 && MI.getOpcode() != BPF::XFADDD && in processAtomicInsts() 190 MI.getOpcode() != BPF::XFANDW32 && MI.getOpcode() != BPF::XFANDD && in processAtomicInsts() 191 MI.getOpcode() != BPF::XFXORW32 && MI.getOpcode() != BPF::XFXORD && in processAtomicInsts() 192 MI.getOpcode() != BPF::XFORW32 && MI.getOpcode() != BPF::XFORD) in processAtomicInsts() 200 switch (MI.getOpcode()) { in processAtomicInsts()
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/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGNodes.h | 208 inline unsigned getOpcode() const; 644 unsigned getOpcode() const { return (unsigned)NodeType; } 695 bool isVPOpcode() const { return ISD::isVPOpcode(getOpcode()); } 878 if (TopologicalPrune && M->getOpcode() != ISD::TokenFactor && (NId > 0) && 1137 inline unsigned SDValue::getOpcode() const { 1138 return Node->getOpcode(); 1270 return N->getOpcode() == ISD::ADDRSPACECAST; 1381 switch (getOpcode()) { 1400 switch (N->getOpcode()) { 1459 unsigned Op = getOpcode(); [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | R600EmitClauseMarkers.cpp | 38 switch (MI.getOpcode()) { in OccupiedDwords() 52 if (TII->isLDSRetInstr(MI.getOpcode())) in OccupiedDwords() 55 if (TII->isVector(MI) || TII->isCubeOp(MI.getOpcode()) || in OccupiedDwords() 56 TII->isReductionOp(MI.getOpcode())) in OccupiedDwords() 71 if (TII->isALUInstr(MI.getOpcode())) in isALU() 73 if (TII->isVector(MI) || TII->isCubeOp(MI.getOpcode())) in isALU() 75 switch (MI.getOpcode()) { in isALU() 89 switch (MI.getOpcode()) { in IsTrivialInst() 119 if (!TII->isALUInstr(MI.getOpcode()) && MI.getOpcode() != R600::DOT_4) in SubstituteKCacheBank() 125 (TII->isALUInstr(MI.getOpcode()) || MI.getOpcode() == R600::DOT_4) && in SubstituteKCacheBank() [all …]
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H A D | R600Packetizer.cpp | 67 if (!TII->isALUInstr(I->getOpcode()) && !I->isBundle()) in getPreviousVector() 81 int OperandIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::write); in getPreviousVector() 84 int DstIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::dst); in getPreviousVector() 93 if (BI->getOpcode() == R600::DOT4_r600 || in getPreviousVector() 94 BI->getOpcode() == R600::DOT4_eg) { in getPreviousVector() 131 int OperandIdx = TII->getOperandIdx(MI.getOpcode(), Op); in substitutePV() 166 if (!TII->isALUInstr(MI.getOpcode())) in isSoloInstruction() 168 if (MI.getOpcode() == R600::GROUP_BARRIER) in isSoloInstruction() 172 return TII->isLDSInstr(MI.getOpcode()); in isSoloInstruction() 182 int OpI = TII->getOperandIdx(MII->getOpcode(), R600::OpName::pred_sel), in isLegalToPacketizeTogether() [all …]
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H A D | R600InstrInfo.cpp | 37 return get(MI.getOpcode()).TSFlags & R600_InstFlag::VECTOR; in isVector() 139 if (isALUInstr(MI.getOpcode())) in canBeConsideredALU() 141 if (isVector(MI) || isCubeOp(MI.getOpcode())) in canBeConsideredALU() 143 switch (MI.getOpcode()) { in canBeConsideredALU() 163 return isTransOnly(MI.getOpcode()); in isTransOnly() 171 return isVectorOnly(MI.getOpcode()); in isVectorOnly() 185 usesVertexCache(MI.getOpcode()); in usesVertexCache() 195 usesVertexCache(MI.getOpcode())) || in usesTextureCache() 196 usesTextureCache(MI.getOpcode()); in usesTextureCache() 218 if (!isALUInstr(MI.getOpcode())) { in readsLDSSrcReg() [all …]
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/openbsd-src/gnu/llvm/llvm/include/llvm/IR/ |
H A D | Operator.h | 41 unsigned getOpcode() const { in getOpcode() function 43 return I->getOpcode(); in getOpcode() 44 return cast<ConstantExpr>(this)->getOpcode(); in getOpcode() 49 static unsigned getOpcode(const Value *V) { in getOpcode() function 51 return I->getOpcode(); in getOpcode() 53 return CE->getOpcode(); in getOpcode() 110 return I->getOpcode() == Instruction::Add || in classof() 111 I->getOpcode() == Instruction::Sub || in classof() 112 I->getOpcode() == Instruction::Mul || in classof() 113 I->getOpcode() == Instruction::Shl; in classof() [all …]
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H A D | Instruction.h | 168 unsigned getOpcode() const { return getValueID() - InstructionVal; } 170 const char *getOpcodeName() const { return getOpcodeName(getOpcode()); } 171 bool isTerminator() const { return isTerminator(getOpcode()); } 172 bool isUnaryOp() const { return isUnaryOp(getOpcode()); } 173 bool isBinaryOp() const { return isBinaryOp(getOpcode()); } 174 bool isIntDivRem() const { return isIntDivRem(getOpcode()); } 175 bool isShift() const { return isShift(getOpcode()); } 176 bool isCast() const { return isCast(getOpcode()); } 177 bool isFuncletPad() const { return isFuncletPad(getOpcode()); } 179 return isExceptionalTerminator(getOpcode()); [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/ |
H A D | LanaiISelDAGToDAG.cpp | 117 if (Addr.getOpcode() == ISD::OR && in INITIALIZE_PASS() 118 Addr.getOperand(1).getOpcode() == LanaiISD::SMALL) { in INITIALIZE_PASS() 167 if ((Addr.getOpcode() == ISD::TargetExternalSymbol || in selectAddrRiSpls() 168 Addr.getOpcode() == ISD::TargetGlobalAddress)) in selectAddrRiSpls() 172 ISD::NodeType AluOperator = static_cast<ISD::NodeType>(Addr.getOpcode()); in selectAddrRiSpls() 196 Addr.getOperand(1).getOpcode() == LanaiISD::SMALL) in selectAddrRiSpls() 218 if (Addr.getOpcode() == ISD::FrameIndex) in selectAddrRr() 222 if ((Addr.getOpcode() == ISD::TargetExternalSymbol || in selectAddrRr() 223 Addr.getOpcode() == ISD::TargetGlobalAddress)) in selectAddrRr() 227 ISD::NodeType AluOperator = static_cast<ISD::NodeType>(Addr.getOpcode()); in selectAddrRr() [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/ARC/ |
H A D | ARCISelDAGToDAG.cpp | 78 if (Addr.getOpcode() == ARCISD::GAWRAPPER) { in SelectAddrModeImm() 88 if (Addr.getOpcode() == ARCISD::GAWRAPPER) { in SelectAddrModeS9() 92 if (Addr.getOpcode() != ISD::ADD && Addr.getOpcode() != ISD::SUB && in SelectAddrModeS9() 94 if (Addr.getOpcode() == ISD::FrameIndex) { in SelectAddrModeS9() 108 if (Addr.getOpcode() == ISD::SUB) in SelectAddrModeS9() 115 if (Base.getOpcode() == ISD::FrameIndex) { in SelectAddrModeS9() 132 if (Addr.getOpcode() == ARCISD::GAWRAPPER) { in SelectAddrModeFar() 137 if (Addr.getOpcode() == ISD::SUB) in SelectAddrModeFar() 155 if (Addr.getOpcode() == ISD::ADD) { in SelectFrameADDR_ri() 171 switch (N->getOpcode()) { in Select()
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/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
H A D | MVETPAndVPTOptimisationsPass.cpp | 102 while (MI && MI->getOpcode() == TargetOpcode::COPY && in INITIALIZE_PASS_DEPENDENCY() 124 if (T.getOpcode() == ARM::t2LoopEnd && T.getOperand(1).getMBB() == Header) { in findLoopComponents() 128 if (T.getOpcode() == ARM::t2LoopEndDec && in findLoopComponents() 149 if (LoopEnd->getOpcode() == ARM::t2LoopEndDec) in findLoopComponents() 154 if (!LoopDec || LoopDec->getOpcode() != ARM::t2LoopDec) { in findLoopComponents() 163 if (!LoopPhi || LoopPhi->getOpcode() != TargetOpcode::PHI || in findLoopComponents() 176 if (!LoopStart || (LoopStart->getOpcode() != ARM::t2DoLoopStart && in findLoopComponents() 177 LoopStart->getOpcode() != ARM::t2WhileLoopSetup && in findLoopComponents() 178 LoopStart->getOpcode() != ARM::t2WhileLoopStartLR)) { in findLoopComponents() 189 assert(MI->getOpcode() == ARM::t2WhileLoopSetup && in RevertWhileLoopSetup() [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
H A D | HexagonNewValueJump.cpp | 136 if (II->getOpcode() == TargetOpcode::KILL) in INITIALIZE_PASS_DEPENDENCY() 220 if (MII->getOpcode() == TargetOpcode::KILL || in commonChecksToProhibitNewValueJump() 221 MII->getOpcode() == TargetOpcode::PHI || in commonChecksToProhibitNewValueJump() 222 MII->getOpcode() == TargetOpcode::COPY) in commonChecksToProhibitNewValueJump() 229 if (MII->getOpcode() == Hexagon::LDriw_pred || in commonChecksToProhibitNewValueJump() 230 MII->getOpcode() == Hexagon::STriw_pred) in commonChecksToProhibitNewValueJump() 257 switch (MI.getOpcode()) { in canCompareBeNewValueJump() 295 if (def->getOpcode() == TargetOpcode::COPY) in canCompareBeNewValueJump() 347 switch (MI->getOpcode()) { in getNewValueJumpOpcode() 429 switch (MI.getOpcode()) { in isNewValueJumpCandidate() [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyCFGStackify.cpp | 305 if (MI.getOpcode() == WebAssembly::LOOP) { in placeBlockMarker() 319 if (MI.getOpcode() == WebAssembly::BLOCK || in placeBlockMarker() 320 MI.getOpcode() == WebAssembly::TRY) { in placeBlockMarker() 331 if (MI.getOpcode() == WebAssembly::END_BLOCK || in placeBlockMarker() 332 MI.getOpcode() == WebAssembly::END_LOOP || in placeBlockMarker() 333 MI.getOpcode() == WebAssembly::END_TRY) in placeBlockMarker() 367 if (MI.getOpcode() == WebAssembly::LOOP || in placeBlockMarker() 368 MI.getOpcode() == WebAssembly::TRY) in placeBlockMarker() 376 if (MI.getOpcode() == WebAssembly::END_LOOP || in placeBlockMarker() 377 MI.getOpcode() == WebAssembly::END_TRY) { in placeBlockMarker() [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/ |
H A D | DelaySlotFiller.cpp | 116 (MI->getOpcode() == SP::RESTORErr in runOnMachineBasicBlock() 117 || MI->getOpcode() == SP::RESTOREri)) { in runOnMachineBasicBlock() 125 (MI->getOpcode() == SP::FCMPS || MI->getOpcode() == SP::FCMPD in runOnMachineBasicBlock() 126 || MI->getOpcode() == SP::FCMPQ)) { in runOnMachineBasicBlock() 177 unsigned Opc = slot->getOpcode(); in findDelayInstr() 186 if (J->getOpcode() == SP::RESTORErr in findDelayInstr() 187 || J->getOpcode() == SP::RESTOREri) { in findDelayInstr() 272 unsigned Opcode = candidate->getOpcode(); in delayHasHazard() 298 switch(MI->getOpcode()) { in insertCallDefsUses() 336 if (MO.isImplicit() && MI->getOpcode() == SP::RETL) in insertDefsUses() [all …]
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H A D | SparcISelDAGToDAG.cpp | 90 if (Addr.getOpcode() == ISD::TargetExternalSymbol || in SelectADDRri() 91 Addr.getOpcode() == ISD::TargetGlobalAddress || in SelectADDRri() 92 Addr.getOpcode() == ISD::TargetGlobalTLSAddress) in SelectADDRri() 95 if (Addr.getOpcode() == ISD::ADD) { in SelectADDRri() 111 if (Addr.getOperand(0).getOpcode() == SPISD::Lo) { in SelectADDRri() 116 if (Addr.getOperand(1).getOpcode() == SPISD::Lo) { in SelectADDRri() 128 if (Addr.getOpcode() == ISD::FrameIndex) return false; in SelectADDRrr() 129 if (Addr.getOpcode() == ISD::TargetExternalSymbol || in SelectADDRrr() 130 Addr.getOpcode() == ISD::TargetGlobalAddress || in SelectADDRrr() 131 Addr.getOpcode() == ISD::TargetGlobalTLSAddress) in SelectADDRrr() [all …]
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/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCMIPeephole.cpp | 179 unsigned Opcode = MI->getOpcode(); in getKnownLeadingZeroCount() 301 unsigned Opcode = Instr->getOpcode(); in collectUnprimedAccPHIs() 342 unsigned Opcode = PHIInput->getOpcode(); in convertUnprimedAccPHIs() 449 switch (MI.getOpcode()) { in simplifyCode() 472 if (RootPHI->getOpcode() != PPC::PHI) in simplifyCode() 542 unsigned DefOpc = DefMI->getOpcode(); in simplifyCode() 555 if (LoadMI && LoadMI->getOpcode() == PPC::LXVDSX) in simplifyCode() 650 unsigned MyOpcode = MI.getOpcode(); in simplifyCode() 659 unsigned DefOpcode = DefMI->getOpcode(); in simplifyCode() 667 return Splt && (Splt->getOpcode() == PPC::LXVWSX || in simplifyCode() [all …]
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H A D | PPCBranchSelector.cpp | 142 if (TII->isPrefixed(MI.getOpcode())) { in ComputeBlockSizes() 329 if (I->getOpcode() == PPC::BCC && !I->getOperand(2).isImm()) in runOnMachineFunction() 331 else if ((I->getOpcode() == PPC::BC || I->getOpcode() == PPC::BCn) && in runOnMachineFunction() 334 else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ || in runOnMachineFunction() 335 I->getOpcode() == PPC::BDZ8 || I->getOpcode() == PPC::BDZ) && in runOnMachineFunction() 358 if (I->getOpcode() == PPC::BCC) { in runOnMachineFunction() 369 } else if (I->getOpcode() == PPC::BC) { in runOnMachineFunction() 372 } else if (I->getOpcode() == PPC::BCn) { in runOnMachineFunction() 375 } else if (I->getOpcode() == PPC::BDNZ) { in runOnMachineFunction() 377 } else if (I->getOpcode() == PPC::BDNZ8) { in runOnMachineFunction() [all …]
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/openbsd-src/gnu/llvm/llvm/include/llvm/MC/ |
H A D | MCInstrAnalysis.h | 40 return Info->get(Inst.getOpcode()).isBranch(); in isBranch() 44 return Info->get(Inst.getOpcode()).isConditionalBranch(); in isConditionalBranch() 48 return Info->get(Inst.getOpcode()).isUnconditionalBranch(); in isUnconditionalBranch() 52 return Info->get(Inst.getOpcode()).isIndirectBranch(); in isIndirectBranch() 56 return Info->get(Inst.getOpcode()).isCall(); in isCall() 60 return Info->get(Inst.getOpcode()).isReturn(); in isReturn() 64 return Info->get(Inst.getOpcode()).isTerminator(); in isTerminator()
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/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
H A D | MipsRegisterBankInfo.cpp | 153 if (MI->getOpcode() == TargetOpcode::G_LOAD || in isGprbTwoInstrUnalignedLoadOrStore() 154 MI->getOpcode() == TargetOpcode::G_STORE) { in isGprbTwoInstrUnalignedLoadOrStore() 186 if (NonCopyInstr->getOpcode() == TargetOpcode::COPY && in addDefUses() 208 while (Ret->getOpcode() == TargetOpcode::COPY && in skipCopiesOutgoing() 222 while (Ret->getOpcode() == TargetOpcode::COPY && in skipCopiesIncoming() 230 assert(isAmbiguous(MI->getOpcode()) && in AmbiguousRegDefUseContainer() 235 if (MI->getOpcode() == TargetOpcode::G_LOAD) in AmbiguousRegDefUseContainer() 238 if (MI->getOpcode() == TargetOpcode::G_STORE) in AmbiguousRegDefUseContainer() 241 if (MI->getOpcode() == TargetOpcode::G_PHI) { in AmbiguousRegDefUseContainer() 248 if (MI->getOpcode() == TargetOpcode::G_SELECT) { in AmbiguousRegDefUseContainer() [all …]
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/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 266 assert(N->getOpcode() != ISD::DELETED_NODE && in AddToWorklist() 271 if (N->getOpcode() == ISD::HANDLENODE) in AddToWorklist() 671 switch (StoreVal.getOpcode()) { in getStoreSource() 914 if (N.getOpcode() == ISD::SETCC) { in isSetCCEquivalent() 922 (N.getOpcode() == ISD::STRICT_FSETCC || in isSetCCEquivalent() 923 N.getOpcode() == ISD::STRICT_FSETCCS)) { in isSetCCEquivalent() 930 if (N.getOpcode() != ISD::SELECT_CC || !TLI.isConstTrueVal(N.getOperand(2)) || in isSetCCEquivalent() 987 if (N.getOpcode() != ISD::BUILD_VECTOR && N.getOpcode() != ISD::SPLAT_VECTOR) in isConstantOrConstantVector() 1004 if (V.getOpcode() != ISD::BUILD_VECTOR) in isAnyConstantBuildVector() 1013 (LD->getOperand(2).getOpcode() != ISD::TargetConstant || in canSplitIdx() [all …]
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