Home
last modified time | relevance | path

Searched refs:fixed_vector (Results 1 – 25 of 27) sorted by relevance

12

/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86LegalizerInfo.cpp297 const LLT v4s32 = LLT::fixed_vector(4, 32); in setLegalizerInfoSSE1()
298 const LLT v2s64 = LLT::fixed_vector(2, 64); in setLegalizerInfoSSE1()
330 const LLT v16s8 = LLT::fixed_vector(16, 8); in setLegalizerInfoSSE2()
331 const LLT v8s16 = LLT::fixed_vector(8, 16); in setLegalizerInfoSSE2()
332 const LLT v4s32 = LLT::fixed_vector(4, 32); in setLegalizerInfoSSE2()
333 const LLT v2s64 = LLT::fixed_vector(2, 64); in setLegalizerInfoSSE2()
335 const LLT v32s8 = LLT::fixed_vector(32, 8); in setLegalizerInfoSSE2()
336 const LLT v16s16 = LLT::fixed_vector(16, 16); in setLegalizerInfoSSE2()
337 const LLT v8s32 = LLT::fixed_vector(8, 32); in setLegalizerInfoSSE2()
338 const LLT v4s64 = LLT::fixed_vector(4, 64); in setLegalizerInfoSSE2()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/SPIRV/
H A DSPIRVLegalizerInfo.cpp69 const LLT v16s64 = LLT::fixed_vector(16, 64); in SPIRVLegalizerInfo()
70 const LLT v16s32 = LLT::fixed_vector(16, 32); in SPIRVLegalizerInfo()
71 const LLT v16s16 = LLT::fixed_vector(16, 16); in SPIRVLegalizerInfo()
72 const LLT v16s8 = LLT::fixed_vector(16, 8); in SPIRVLegalizerInfo()
73 const LLT v16s1 = LLT::fixed_vector(16, 1); in SPIRVLegalizerInfo()
75 const LLT v8s64 = LLT::fixed_vector(8, 64); in SPIRVLegalizerInfo()
76 const LLT v8s32 = LLT::fixed_vector(8, 32); in SPIRVLegalizerInfo()
77 const LLT v8s16 = LLT::fixed_vector(8, 16); in SPIRVLegalizerInfo()
78 const LLT v8s8 = LLT::fixed_vector(8, 8); in SPIRVLegalizerInfo()
79 const LLT v8s1 = LLT::fixed_vector(8, 1); in SPIRVLegalizerInfo()
[all …]
H A DSPIRVPreLegalizer.cpp321 NewT = LLT::fixed_vector(2, NewT); in createNewIdReg()
H A DSPIRVBuiltins.cpp954 LLT::fixed_vector(3, PointerSize)); in genWorkgroupQuery()
1026 LLT::fixed_vector(Call->ReturnType->getOperand(2).getImm(), BitWidth); in generateBuiltinVar()
1127 LLT::fixed_vector(NumActualRetComponents, 32)); in generateImageSizeQueryInst()
H A DSPIRVGlobalRegistry.cpp333 LLT LLTy = EmitIR ? LLT::fixed_vector(ElemCnt, BitWidth) : LLT::scalar(32); in getOrCreateIntCompositeOrNull()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/
H A DAArch64LegalizerInfo.cpp50 const LLT v16s8 = LLT::fixed_vector(16, 8); in AArch64LegalizerInfo()
51 const LLT v8s8 = LLT::fixed_vector(8, 8); in AArch64LegalizerInfo()
52 const LLT v4s8 = LLT::fixed_vector(4, 8); in AArch64LegalizerInfo()
53 const LLT v8s16 = LLT::fixed_vector(8, 16); in AArch64LegalizerInfo()
54 const LLT v4s16 = LLT::fixed_vector(4, 16); in AArch64LegalizerInfo()
55 const LLT v2s16 = LLT::fixed_vector(2, 16); in AArch64LegalizerInfo()
56 const LLT v2s32 = LLT::fixed_vector(2, 32); in AArch64LegalizerInfo()
57 const LLT v4s32 = LLT::fixed_vector(4, 32); in AArch64LegalizerInfo()
58 const LLT v2s64 = LLT::fixed_vector(2, 64); in AArch64LegalizerInfo()
59 const LLT v2p0 = LLT::fixed_vector(2, p0); in AArch64LegalizerInfo()
[all …]
H A DAArch64InstructionSelector.cpp1843 if (Ty == LLT::fixed_vector(2, 64)) { in selectVectorSHL()
1845 } else if (Ty == LLT::fixed_vector(4, 32)) { in selectVectorSHL()
1847 } else if (Ty == LLT::fixed_vector(2, 32)) { in selectVectorSHL()
1849 } else if (Ty == LLT::fixed_vector(4, 16)) { in selectVectorSHL()
1851 } else if (Ty == LLT::fixed_vector(8, 16)) { in selectVectorSHL()
1853 } else if (Ty == LLT::fixed_vector(16, 8)) { in selectVectorSHL()
1855 } else if (Ty == LLT::fixed_vector(8, 8)) { in selectVectorSHL()
1897 if (Ty == LLT::fixed_vector(2, 64)) { in selectVectorAshrLshr()
1900 } else if (Ty == LLT::fixed_vector(4, 32)) { in selectVectorAshrLshr()
1903 } else if (Ty == LLT::fixed_vector(2, 32)) { in selectVectorAshrLshr()
[all …]
H A DAArch64PostLegalizerLowering.cpp750 if (SrcTy == LLT::fixed_vector(2, LLT::scalar(32))) { in applyDupLane()
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp100 LLT::fixed_vector(Ty.getNumElements() + 1, EltTy)); in oneMoreElement()
130 return std::pair(TypeIdx, LLT::fixed_vector(NewNumElts, EltTy)); in moreEltsToNext32Bit()
444 const LLT V2S8 = LLT::fixed_vector(2, 8); in AMDGPULegalizerInfo()
445 const LLT V2S16 = LLT::fixed_vector(2, 16); in AMDGPULegalizerInfo()
446 const LLT V4S16 = LLT::fixed_vector(4, 16); in AMDGPULegalizerInfo()
448 const LLT V2S32 = LLT::fixed_vector(2, 32); in AMDGPULegalizerInfo()
449 const LLT V3S32 = LLT::fixed_vector(3, 32); in AMDGPULegalizerInfo()
450 const LLT V4S32 = LLT::fixed_vector(4, 32); in AMDGPULegalizerInfo()
451 const LLT V5S32 = LLT::fixed_vector(5, 32); in AMDGPULegalizerInfo()
452 const LLT V6S32 = LLT::fixed_vector(6, 32); in AMDGPULegalizerInfo()
[all …]
H A DAMDGPUGlobalISelUtils.cpp71 if (Ty == LLT::fixed_vector(2, 16) || Ty == LLT::scalar(64)) in hasAtomicFaddRtnForTy()
H A DAMDGPUArgumentUsageInfo.cpp95 &AMDGPU::SGPR_128RegClass, LLT::fixed_vector(4, 32)); in getPreloadedValue()
H A DAMDGPUPreLegalizerCombiner.cpp135 const LLT V2S16 = LLT::fixed_vector(2, 16); in applyClampI64ToI16()
H A DAMDGPURegisterBankInfo.cpp1047 return LLT::fixed_vector(128 / EltTy.getSizeInBits(), EltTy); in widen96To128()
1786 return B.buildMergeLikeInstr(LLT::fixed_vector(NumElts, S32), WideRegs) in handleD16VData()
2101 LLT MergeTy = LLT::fixed_vector(Ops.size(), EltTy); in foldInsertEltToCmpSelect()
2423 if (DstTy != LLT::scalar(16) && DstTy != LLT::fixed_vector(2, 16)) in applyMappingImpl()
2729 LLT Vec32 = LLT::fixed_vector(2 * SrcTy.getNumElements(), 32); in applyMappingImpl()
2846 LLT Vec32 = LLT::fixed_vector(2 * VecTy.getNumElements(), 32); in applyMappingImpl()
3879 if (DstTy == LLT::fixed_vector(2, 16)) { in getInstrMapping()
H A DAMDGPUInstructionSelector.cpp681 if (MRI->getType(Dst) != LLT::fixed_vector(2, 16) || in selectG_BUILD_VECTOR()
2181 if (DstTy == LLT::fixed_vector(2, 16) && SrcTy == LLT::fixed_vector(2, 32)) { in selectG_TRUNC()
3650 MRI.getType(Src) == LLT::fixed_vector(2, 16)) { in selectVOP3PModsImpl()
4906 LLT::fixed_vector(2, 16)); in isExtractHiElt()
H A DAMDGPUCallLowering.cpp1152 auto ScratchRSrcReg = MIRBuilder.buildCopy(LLT::fixed_vector(4, 32), in handleImplicitCallArguments()
/openbsd-src/gnu/llvm/llvm/include/llvm/Support/
H A DLowLevelTypeImpl.h76 static constexpr LLT fixed_vector(unsigned NumElements, in fixed_vector() function
83 static constexpr LLT fixed_vector(unsigned NumElements, LLT ScalarTy) { in fixed_vector() function
226 return fixed_vector(Factor, *this); in multiplyElements()
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp75 const LLT v16s8 = LLT::fixed_vector(16, 8); in MipsLegalizerInfo()
76 const LLT v8s16 = LLT::fixed_vector(8, 16); in MipsLegalizerInfo()
77 const LLT v4s32 = LLT::fixed_vector(4, 32); in MipsLegalizerInfo()
78 const LLT v2s64 = LLT::fixed_vector(2, 64); in MipsLegalizerInfo()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DLegalizeMutations.cpp104 TypeIdx, LLT::fixed_vector(NewNumElements, VecTy.getElementType())); in moreElementsToNextPow2()
H A DLegacyLegalizerInfo.cpp345 IntermediateType = LLT::fixed_vector(Aspect.Type.getNumElements(), in findVectorLegalAction()
359 LLT::fixed_vector(NumElementsAndAction.first, in findVectorLegalAction()
H A DUtils.cpp926 return LLT::fixed_vector(LCMSize / OrigElt.getSizeInBits(), OrigElt); in getLCMType()
931 return LLT::fixed_vector(LCMSize / OrigSize, OrigTy); in getLCMType()
989 return LLT::fixed_vector(GCD / OrigElt.getSizeInBits(), OrigElt); in getGCDType()
H A DCallLowering.cpp473 LLT BVType = LLT::fixed_vector(LLTy.getNumElements(), PartLLT); in buildCopyFromRegs()
H A DLegalizerHelper.cpp219 LLT NarrowTy = (NumElts == 1) ? EltTy : LLT::fixed_vector(NumElts, EltTy); in extractVectorParts()
245 LLT LeftoverTy = LLT::fixed_vector(LeftoverNumElts, EltTy); in extractVectorParts()
2663 DstCastTy = LLT::fixed_vector(NumDstElt / NumSrcElt, DstEltTy); in lowerBitcast()
2675 SrcPartTy = LLT::fixed_vector(NumSrcElt / NumDstElt, SrcEltTy); in lowerBitcast()
3658 LLT NarrowTy = (NumElts == 1) ? EltTy : LLT::fixed_vector(NumElts, EltTy); in makeDstOps()
4972 LLT PaddedTy = LLT::fixed_vector(PaddedMaskNumElts, DestEltTy); in equalizeVectorShuffleLengths()
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerInfo.h1107 TypeIdx, LLT::fixed_vector(MinElements, VecTy.getElementType())); in clampMinNumElements()
1126 TypeIdx, LLT::fixed_vector(NewSize, VecTy.getElementType())); in alignNumElementsTo()
H A DLegalizationArtifactCombiner.h631 LLT NewBVTy = LLT::fixed_vector(NumSrcsUsed, SrcTy); in findValueFromBuildVector()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/MIRParser/
H A DMIParser.cpp1958 Ty = LLT::fixed_vector(NumElements, Ty); in parseLowLevelType()

12