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Searched refs:createRegister (Results 1 – 15 of 15) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUArgumentUsageInfo.cpp154 = ArgDescriptor::createRegister(AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3); in fixedABILayout()
155 AI.DispatchPtr = ArgDescriptor::createRegister(AMDGPU::SGPR4_SGPR5); in fixedABILayout()
156 AI.QueuePtr = ArgDescriptor::createRegister(AMDGPU::SGPR6_SGPR7); in fixedABILayout()
160 AI.ImplicitArgPtr = ArgDescriptor::createRegister(AMDGPU::SGPR8_SGPR9); in fixedABILayout()
161 AI.DispatchID = ArgDescriptor::createRegister(AMDGPU::SGPR10_SGPR11); in fixedABILayout()
164 AI.WorkGroupIDX = ArgDescriptor::createRegister(AMDGPU::SGPR12); in fixedABILayout()
165 AI.WorkGroupIDY = ArgDescriptor::createRegister(AMDGPU::SGPR13); in fixedABILayout()
166 AI.WorkGroupIDZ = ArgDescriptor::createRegister(AMDGPU::SGPR14); in fixedABILayout()
167 AI.LDSKernelId = ArgDescriptor::createRegister(AMDGPU::SGPR15); in fixedABILayout()
170 AI.WorkItemIDX = ArgDescriptor::createRegister(AMDGPU::VGPR31, Mask); in fixedABILayout()
[all …]
H A DSIMachineFunctionInfo.cpp100 ArgDescriptor::createRegister(ScratchRSrcReg); in SIMachineFunctionInfo()
183 ArgDescriptor::createRegister(AMDGPU::SGPR5); in SIMachineFunctionInfo()
223 ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addPrivateSegmentBuffer()
230 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchPtr()
237 ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addQueuePtr()
245 = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addKernargSegmentPtr()
252 ArgInfo.DispatchID = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchID()
259 ArgInfo.FlatScratchInit = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addFlatScratchInit()
266 ArgInfo.ImplicitBufferPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addImplicitBufferPtr()
273 ArgInfo.LDSKernelId = ArgDescriptor::createRegister(getNextUserSGPR()); in addLDSKernelId()
H A DSIMachineFunctionInfo.h697 ArgInfo.WorkGroupIDX = ArgDescriptor::createRegister(getNextSystemSGPR());
703 ArgInfo.WorkGroupIDY = ArgDescriptor::createRegister(getNextSystemSGPR());
709 ArgInfo.WorkGroupIDZ = ArgDescriptor::createRegister(getNextSystemSGPR());
715 ArgInfo.WorkGroupInfo = ArgDescriptor::createRegister(getNextSystemSGPR());
735 = ArgDescriptor::createRegister(getNextSystemSGPR());
741 ArgInfo.PrivateSegmentWaveByteOffset = ArgDescriptor::createRegister(Reg);
H A DAMDGPUArgumentUsageInfo.h44 static constexpr ArgDescriptor createRegister(Register Reg,
H A DAMDGPUTargetMachine.cpp1524 Arg = ArgDescriptor::createRegister(Reg); in parseMachineFunctionInfo()
H A DSIISelLowering.cpp1933 Info.setWorkItemIDX(ArgDescriptor::createRegister(Reg, Mask)); in allocateSpecialEntryInputVGPRs()
1939 Info.setWorkItemIDY(ArgDescriptor::createRegister(AMDGPU::VGPR0, in allocateSpecialEntryInputVGPRs()
1946 Info.setWorkItemIDY(ArgDescriptor::createRegister(Reg)); in allocateSpecialEntryInputVGPRs()
1953 Info.setWorkItemIDZ(ArgDescriptor::createRegister(AMDGPU::VGPR0, in allocateSpecialEntryInputVGPRs()
1960 Info.setWorkItemIDZ(ArgDescriptor::createRegister(Reg)); in allocateSpecialEntryInputVGPRs()
1990 return ArgDescriptor::createRegister(Reg, Mask); in allocateVGPR32Input()
2007 return ArgDescriptor::createRegister(Reg); in allocateSGPR32InputImpl()
2069 Info.setWorkItemIDX(ArgDescriptor::createRegister(Reg, Mask)); in allocateSpecialInputVGPRsFixed()
2070 Info.setWorkItemIDY(ArgDescriptor::createRegister(Reg, Mask << 10)); in allocateSpecialInputVGPRsFixed()
2071 Info.setWorkItemIDZ(ArgDescriptor::createRegister(Reg, Mask << 20)); in allocateSpecialInputVGPRsFixed()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfExpression.cpp104 DwarfRegs.push_back(Register::createRegister(-1, nullptr)); in addMachineReg()
114 DwarfRegs.push_back(Register::createRegister(Reg, nullptr)); in addMachineReg()
126 DwarfRegs.push_back(Register::createRegister(Reg, "super-register")); in addMachineReg()
166 DwarfRegs.push_back(Register::createRegister(Reg, "sub-register")); in addMachineReg()
H A DDwarfExpression.h114 static Register createRegister(int RegNo, const char *Comment) { in createRegister() function
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DCFIInstrInserter.cpp376 MCCFIInstruction::createRegister(nullptr, Reg, *RO.Reg)); in insertCFIInstrs()
/openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/
H A DSparcFrameLowering.cpp168 MCCFIInstruction::createRegister(nullptr, regOutRA, regInRA)); in emitPrologue()
/openbsd-src/gnu/llvm/llvm/include/llvm/MC/
H A DMCDwarf.h586 static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, in createRegister() function
/openbsd-src/gnu/llvm/llvm/lib/MC/
H A DMCStreamer.cpp661 MCCFIInstruction::createRegister(Label, Register1, Register2); in emitCFIRegister()
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.cpp1212 unsigned CFIRegister = MF.addFrameInst(MCCFIInstruction::createRegister( in emitPrologue()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/MIRParser/
H A DMIParser.cpp2548 MF.addFrameInst(MCCFIInstruction::createRegister(nullptr, Reg, Reg2)); in parseCFIOperand()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp6527 MCCFIInstruction::createRegister(nullptr, DwarfLR, DwarfReg)); in emitCFIForLRSaveToReg()