Home
last modified time | relevance | path

Searched refs:coprocessor (Results 1 – 25 of 80) sorted by relevance

1234

/openbsd-src/sys/arch/arm/arm/
H A Dundefined.c145 int coprocessor; in undefinedinstruction() local
190 coprocessor = 0; in undefinedinstruction()
192 coprocessor = (fault_instruction >> 8) & 0x0f; in undefinedinstruction()
196 coprocessor = 10; /* vfp / simd */ in undefinedinstruction()
210 LIST_FOREACH(uh, &undefined_handlers[coprocessor], uh_link) in undefinedinstruction()
/openbsd-src/gnu/usr.bin/binutils-2.17/cpu/
H A Diq2000m.cpu120 ; Architectural and coprocessor instructions.
181 (dni cfc0 "control from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
187 (dni cfc1 "control from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
193 (dni cfc2 "control from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
199 (dni cfc3 "control from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
215 (dni ctc0 "control to coprocessor 0" (MACH2000 USES-RT)
221 (dni ctc1 "control to coprocessor 1" (MACH2000 USES-RT)
227 (dni ctc2 "control to coprocessor 2" (MACH2000 USES-RT)
233 (dni ctc3 "control to coprocessor 3" (MACH2000 USES-RT)
323 (dni mfc0 "move from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
[all …]
H A Diq2000.cpu35 (comment "IQ10 coprocessor family")
51 (comment "IQ10 coprocessor")
67 (comment "IQ10 coprocessor")
131 (dnf f-cp-op "coprocessor op field" () 10 3)
132 (dnf f-cp-op-10 "coprocessor op field for CAM" () 10 5)
133 (dnf f-cp-grp "coprocessor group field" () 7 2)
258 ; coprocessor opcodes in concert with f-cp-grp
277 ; coprocessor opcodes in concert with f-cp-grp
289 cop2_functions "iq10 coprocessor sub-opcodes" () FUNC10_ f-cp-op
294 cop3_cam_functions "iq10 coprocessor cam sub-opcodes" () FUNC10_ f-cp-op-10
H A Diq10.cpu360 ; Architectural and coprocessor instructions.
758 (dni cfc "copy from coprocessor control register" (MACH10 LOAD-DELAY USES-RD YIELD-INSN)
764 (dni ctc "copy to coprocessor control register" (MACH10 USES-RS)
/openbsd-src/gnu/usr.bin/binutils/cpu/
H A Diq2000m.cpu120 ; Architectural and coprocessor instructions.
181 (dni cfc0 "control from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
187 (dni cfc1 "control from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
193 (dni cfc2 "control from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
199 (dni cfc3 "control from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
215 (dni ctc0 "control to coprocessor 0" (MACH2000 USES-RT)
221 (dni ctc1 "control to coprocessor 1" (MACH2000 USES-RT)
227 (dni ctc2 "control to coprocessor 2" (MACH2000 USES-RT)
233 (dni ctc3 "control to coprocessor 3" (MACH2000 USES-RT)
323 (dni mfc0 "move from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
[all …]
H A Diq2000.cpu52 (comment "IQ10 coprocessor family")
68 (comment "IQ10 coprocessor")
84 (comment "IQ10 coprocessor")
148 (dnf f-cp-op "coprocessor op field" () 10 3)
149 (dnf f-cp-op-10 "coprocessor op field for CAM" () 10 5)
150 (dnf f-cp-grp "coprocessor group field" () 7 2)
275 ; coprocessor opcodes in concert with f-cp-grp
294 ; coprocessor opcodes in concert with f-cp-grp
306 cop2_functions "iq10 coprocessor sub-opcodes" () FUNC10_ f-cp-op
311 cop3_cam_functions "iq10 coprocessor cam sub-opcodes" () FUNC10_ f-cp-op-10
H A Diq10.cpu360 ; Architectural and coprocessor instructions.
758 (dni cfc "copy from coprocessor control register" (MACH10 LOAD-DELAY USES-RD YIELD-INSN)
764 (dni ctc "copy to coprocessor control register" (MACH10 USES-RS)
/openbsd-src/sys/arch/mips64/mips64/
H A Dlcore_float.S65 or t0, t1, SR_COP_1_BIT|SR_FR_32 # enable the coprocessor
169 or t0, t1, SR_COP_1_BIT # enable the coprocessor
291 or t0, t1, SR_COP_1_BIT|SR_FR_32 # enable the coprocessor
353 or t0, t1, SR_COP_1_BIT # enable the coprocessor
/openbsd-src/sys/arch/i386/conf/
H A DRAMDISK74 npx0 at isa? port 0xf0 irq 13 # math coprocessor
H A DRAMDISK_CD114 npx0 at isa? port 0xf0 irq 13 # math coprocessor
/openbsd-src/gnu/gcc/gcc/config/mips/
H A D7000.md146 ;; Move to/from fp coprocessor.
/openbsd-src/gnu/usr.bin/binutils/gas/doc/
H A Dc-arm.texi98 @code{ep9312} (ARM920 with Cirrus Maverick coprocessor),
100 @code{iwmmxt} (Intel(r) XScale processor with Wireless MMX(tm) technology coprocessor)
H A Dc-i386.texi386 @cindex coprocessor wait, i386
388 The wait for coprocessor prefix @samp{wait} waits for the coprocessor to
H A Dc-m68k.texi535 coprocessor branch instruction, word or long. All Motorola coprocessor
/openbsd-src/gnu/llvm/libunwind/src/
H A DUnwindRegistersRestore.S752 @ So, generate the instruction using the corresponding coprocessor mnemonic.
/openbsd-src/gnu/usr.bin/binutils-2.17/opcodes/
H A DChangeLog-2005141 coprocessor ID 1.
400 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
402 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
709 (regnames): Remove iWMMXt coprocessor register sets.
/openbsd-src/gnu/usr.bin/binutils-2.17/gas/doc/
H A Dc-i386.texi396 @cindex coprocessor wait, i386
398 The wait for coprocessor prefix @samp{wait} waits for the coprocessor to
H A Dc-arm.texi113 @code{ep9312} (ARM920 with Cirrus Maverick coprocessor),
115 @code{iwmmxt} (Intel(r) XScale processor with Wireless MMX(tm) technology coprocessor)
H A Dc-m68k.texi602 coprocessor branch instruction, word or long. All Motorola coprocessor
/openbsd-src/gnu/llvm/llvm/include/llvm/IR/
H A DIntrinsicsARM.td344 // Move to coprocessor
352 // Move from coprocessor
370 // Move from two registers to coprocessor
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMips64InstrInfo.td591 // Move between CPU and coprocessor registers
618 /// Move between CPU and coprocessor registers
630 /// Move between CPU and guest coprocessor registers (Virtualization ASE)
/openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/
H A DSystemZInstrSystem.td448 // Extract coprocessor-group address.
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMInstrInfo.td5597 // Move between coprocessor and ARM core register.
5624 def MCR : MovRCopro<"mcr", 0 /* from ARM core register to coprocessor */,
5634 def MRC : MovRCopro<"mrc", 1 /* from coprocessor to ARM core register */,
5671 def MCR2 : MovRCopro2<"mcr2", 0 /* from ARM core register to coprocessor */,
5681 def MRC2 : MovRCopro2<"mrc2", 1 /* from coprocessor to ARM core register */,
5715 def MCRR : MovRRCopro<"mcrr", 0 /* from ARM core register to coprocessor */,
5720 def MRRC : MovRRCopro<"mrrc", 1 /* from coprocessor to ARM core register */,
5748 def MCRR2 : MovRRCopro2<"mcrr2", 0 /* from ARM core register to coprocessor */,
5754 def MRRC2 : MovRRCopro2<"mrrc2", 1 /* from coprocessor to ARM core register */,
5900 // Reading thread pointer from coprocessor register
/openbsd-src/gnu/usr.bin/binutils-2.17/include/opcode/
H A DChangeLog-9103495 * mips.h: Sort coprocessor instruction argument characters
785 Use 'H' for coprocessor select field.
2422 * m68k.h: Fix argument descriptions of coprocessor
2864 ("c[0123]"): Define general coprocessor instructions.
3027 * mips.h: Fix decoding of coprocessor instructions, somewhat.
/openbsd-src/gnu/usr.bin/binutils/include/opcode/
H A DChangeLog-9103476 * mips.h: Sort coprocessor instruction argument characters
766 Use 'H' for coprocessor select field.
2403 * m68k.h: Fix argument descriptions of coprocessor
2845 ("c[0123]"): Define general coprocessor instructions.
3008 * mips.h: Fix decoding of coprocessor instructions, somewhat.

1234